Debug and resolve complex DRC/LVS violations across hierarchical full-chip designs * Perform ESD ... Bachelor's degree in electrical engineering, computer engineering or computer science * 5+ years of ...
Debug and resolve complex DRC/LVS violations across hierarchical full-chip designs * Perform ESD ... Bachelor's degree in electrical engineering, computer engineering or computer science * 5+ years of ...
Verification Engineer (Remote)
Salem, MA · Remote
$148K/yr
We're seeking a Verification Engineer to contribute to the validation of advanced chip designs. You ... BSEE/MSEE or equivalent in Electrical Engineering, Computer Science, or a related field.
Quick apply
Verification Engineer (Remote)
Salem, MA · Remote
$148K/yr
We're seeking a Verification Engineer to contribute to the validation of advanced chip designs. You ... BSEE/MSEE or equivalent in Electrical Engineering, Computer Science, or a related field.
Chip CAD DevOps Engineer, Google Cloud
Sunnyvale, CA · On-site
$62 - $84.75/hr
... designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems ... As a Chip CAD Engineer, you will be working with a highly creative team, innovating new ways to ...
Chip CAD DevOps Engineer, Google Cloud
Sunnyvale, CA · On-site
$62 - $84.75/hr
... designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems ... As a Chip CAD Engineer, you will be working with a highly creative team, innovating new ways to ...
... computer interfaces. We have crafted a team of exceptional engineers whose mission is to push the ... You will have the opportunity to collaborate closely with chip designers, electrical engineers ...
... computer interfaces. We have crafted a team of exceptional engineers whose mission is to push the ... You will have the opportunity to collaborate closely with chip designers, electrical engineers ...
OR · On-site
What We Need to See: * BS or MS in Electrical Engineering, Computer Engineering, Computer Science ... Deep familiarity with the hardware development lifecycle - you understand how chips get designed ...
Designer / CAD Drafter
Chelmsford, MA · Hybrid
... chip manufacturers worldwide. Our product portfolio includes a range of automation solutions ... Designer / CAD Drafter Brooks Automation is a global leader in advanced robotics, vacuum automation ...
Designer / CAD Drafter
Chelmsford, MA · Hybrid
... chip manufacturers worldwide. Our product portfolio includes a range of automation solutions ... Designer / CAD Drafter Brooks Automation is a global leader in advanced robotics, vacuum automation ...
... computer interfaces. We have crafted a team of exceptional engineers whose mission is to push the ... You will have the opportunity to collaborate closely with chip designers, electrical engineers ...
... computer interfaces. We have crafted a team of exceptional engineers whose mission is to push the ... You will have the opportunity to collaborate closely with chip designers, electrical engineers ...
Designer / CAD Drafter
Chelmsford, MA · On-site
... chip manufacturers worldwide. Our product portfolio includes a range of automation solutions ... Designer / CAD Drafter Brooks Automation is a global leader in advanced robotics, vacuum automation ...
Designer / CAD Drafter
Chelmsford, MA · On-site
... chip manufacturers worldwide. Our product portfolio includes a range of automation solutions ... Designer / CAD Drafter Brooks Automation is a global leader in advanced robotics, vacuum automation ...
Blueridge Global is led by an experienced team of computer architects, chip designers, software leaders, and semiconductor executives with deep backgrounds in advanced SoCs, wireless, AI/ML, compute ...
Blueridge Global is led by an experienced team of computer architects, chip designers, software leaders, and semiconductor executives with deep backgrounds in advanced SoCs, wireless, AI/ML, compute ...
DMTS Digital Design Engineer / Chip Lead
$206K - $410K/yr
... Computer Engineering, or related field * 10+ years of ASIC/digital design experience with at least one prior tape-out in a chip lead, design lead, or senior designer role * Expert-level proficiency ...
DMTS Digital Design Engineer / Chip Lead
$206K - $410K/yr
... Computer Engineering, or related field * 10+ years of ASIC/digital design experience with at least one prior tape-out in a chip lead, design lead, or senior designer role * Expert-level proficiency ...
DMTS Digital Design Engineer / Chip Lead
$206K - $410K/yr
... Computer Engineering, or related field * 10+ years of ASIC/digital design experience with at least one prior tape-out in a chip lead, design lead, or senior designer role * Expert-level proficiency ...
DMTS Digital Design Engineer / Chip Lead
$206K - $410K/yr
... Computer Engineering, or related field * 10+ years of ASIC/digital design experience with at least one prior tape-out in a chip lead, design lead, or senior designer role * Expert-level proficiency ...
DMTS Digital Design Engineer / Chip Lead
Minneapolis, MN · On-site
$206K - $410K/yr
... Computer Engineering, or related field * 10+ years of ASIC/digital design experience with at least one prior tape-out in a chip lead, design lead, or senior designer role * Expert-level proficiency ...
DMTS Digital Design Engineer / Chip Lead
Minneapolis, MN · On-site
$206K - $410K/yr
... Computer Engineering, or related field * 10+ years of ASIC/digital design experience with at least one prior tape-out in a chip lead, design lead, or senior designer role * Expert-level proficiency ...
DMTS Digital Design Engineer / Chip Lead
$206K - $410K/yr
... Computer Engineering, or related field * 10+ years of ASIC/digital design experience with at least one prior tape-out in a chip lead, design lead, or senior designer role * Expert-level proficiency ...
DMTS Digital Design Engineer / Chip Lead
$206K - $410K/yr
... Computer Engineering, or related field * 10+ years of ASIC/digital design experience with at least one prior tape-out in a chip lead, design lead, or senior designer role * Expert-level proficiency ...
... models for chip design tasks, co-designing RL environments, and ensuring production-ready ... Required : • PhD in Computer Science, EECS, Mathematics, or a closely related field. Preferably ...
... models for chip design tasks, co-designing RL environments, and ensuring production-ready ... Required : • PhD in Computer Science, EECS, Mathematics, or a closely related field. Preferably ...
DMTS Digital Design Engineer / Chip Lead
San Jose, CA · On-site
$206K - $410K/yr
... Computer Engineering, or related field * 10+ years of ASIC/digital design experience with at least one prior tape-out in a chip lead, design lead, or senior designer role * Expert-level proficiency ...
DMTS Digital Design Engineer / Chip Lead
San Jose, CA · On-site
$206K - $410K/yr
... Computer Engineering, or related field * 10+ years of ASIC/digital design experience with at least one prior tape-out in a chip lead, design lead, or senior designer role * Expert-level proficiency ...
CAD Designer, Texas Institute for Electronics
Austin, TX · On-site
$26.75 - $37/hr
... chip cooling and more. Situated in the heart of Austin - named "America's Coolest City" by Expedia ... Design (CAD) Designer will be responsible for creating precise technical drawings, making ...
CAD Designer, Texas Institute for Electronics
Austin, TX · On-site
$26.75 - $37/hr
... chip cooling and more. Situated in the heart of Austin - named "America's Coolest City" by Expedia ... Design (CAD) Designer will be responsible for creating precise technical drawings, making ...
Embedded Software Engineer, Implant Embedded Systems
$130K - $171K/yr
... generation brain-computer interfaces. You will have the opportunity to work closely with chip designers, electrical engineers, and software engineers on a small, fast-moving team. and ...
Embedded Software Engineer, Implant Embedded Systems
$130K - $171K/yr
... generation brain-computer interfaces. You will have the opportunity to work closely with chip designers, electrical engineers, and software engineers on a small, fast-moving team. and ...
DMTS Digital Design Engineer / Chip Lead
$206K - $410K/yr
... Computer Engineering, or related field * 10+ years of ASIC/digital design experience with at least one prior tape-out in a chip lead, design lead, or senior designer role * Expert-level proficiency ...
DMTS Digital Design Engineer / Chip Lead
$206K - $410K/yr
... Computer Engineering, or related field * 10+ years of ASIC/digital design experience with at least one prior tape-out in a chip lead, design lead, or senior designer role * Expert-level proficiency ...
Mask Layout Designer
San Diego, CA · On-site
RF high frequency circuit custom layout at chip, block, and device levels * Basic automation ... OR Associate's degree in Computer Science, Mathematics, Electrical Engineering or related field and ...
Mask Layout Designer
San Diego, CA · On-site
RF high frequency circuit custom layout at chip, block, and device levels * Basic automation ... OR Associate's degree in Computer Science, Mathematics, Electrical Engineering or related field and ...
PE CAD Engineering
San Jose, CA · On-site
$126K - $234K/yr
Overview Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional CAD ... designs for memory interface chips, interconnect chips and silicon IP designs. Rambus offers a ...
PE CAD Engineering
San Jose, CA · On-site
$126K - $234K/yr
Overview Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional CAD ... designs for memory interface chips, interconnect chips and silicon IP designs. Rambus offers a ...
Computer Chip Designer information
See salary details
$16.79 is the 25th percentile. Wages below this are outliers.
$10.10 - $18.36
31% of jobs
$18.36 - $26.62
16% of jobs
The median wage is $29.10 / hr.
$26.62 - $34.88
11% of jobs
$34.88 - $43.14
15% of jobs
$48.30 is the 75th percentile. Wages above this are outliers.
$43.14 - $51.40
4% of jobs
$51.40 - $59.66
6% of jobs
$59.66 - $67.92
5% of jobs
$67.92 - $76.18
3% of jobs
$76.18 - $84.44
2% of jobs
$84.44 - $92.70
3% of jobs
$92.70 - $100.96
3% of jobs
$10
$41
$100
How much do computer chip designer jobs pay per hour?
How much money do chip designers make?
What are the key skills and qualifications needed to thrive as a Computer Chip Designer, and why are they important?
What is the difference between Computer Chip Designer vs Hardware Engineer?
| Aspect | Computer Chip Designer | Hardware Engineer |
|---|---|---|
| Credentials | Bachelor's or Master's in Electrical Engineering, Computer Engineering, or related fields | Bachelor's or Master's in Electrical Engineering, Computer Engineering, or related fields |
| Work Environment | Design labs, CAD software, simulation tools | Development labs, testing facilities, manufacturing environments |
| Industry Usage | Semiconductor companies, tech firms, research institutions | Electronics manufacturing, product development, tech companies |
| Search & Comparison Intent | Often compared for design focus and specialization | Broader engineering roles involving hardware development |
Computer Chip Designers focus on creating the architecture and design of integrated circuits using specialized software, while Hardware Engineers work on developing, testing, and implementing electronic hardware systems. Both roles require similar educational backgrounds and often collaborate, but their primary responsibilities differ in scope and focus.
What are some common challenges faced by computer chip designers in collaborative projects?
What does a Computer Chip Designer do?
How hard is it to get into chip design?
Is chip design a good career?
What engineers make $500,000?

$170K - $235K/yr
Other
Medical, Dental, Vision, Life, Retirement, PTO
Posted 13 days ago
SpaceX rating
8.7
Based on 144 frontline employees who took The Breakroom Quiz
13th of 60 rated aerospace companies
Job description
SR. FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING)
At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the world's largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system - thousands of satellites, consumer receivers that allow users to connect within minutes of unboxing, and the software that brings it all together. We've only begun to scratch the surface of Starlink's potential global impact and are looking for best-in-class engineers to help maximize Starlink's utility for communities and businesses around the globe.
We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing cutting-edge next-generation silicon for deployment in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously not been available, affordable or reliable. Your efforts will help deliver cutting-edge solutions that will expand the performance and capabilities of the Starlink network.
RESPONSIBILITIES:
- Own and execute full-chip DRC, LVS, ESD, PERC and antenna signoff using industry standard tools like Calibre, ICV, or Pegasus
- Develop, maintain, and optimize physical verification flows for advanced node SoC's.
- Interpret and implement foundry Design Rule Manuals (DRM) - translate rule updates into verified flow changes
- Debug and resolve complex DRC/LVS violations across hierarchical full-chip designs
- Perform ESD verification - validate protection strategies, current paths, and CDM/HBM compliance
- Drive tapeout readiness by coordinating signoff across block and top-level and Hard IP design teams
- Engage directly with foundry teams to resolve DRM ambiguities and waiver requests.
- Develop/modify design flows as needed to meet the overall design quality of results and chip integration requirements.Leverage AI agents to automate rule deck validation, violation triage, and signoff reporting workflows
BASIC QUALIFICATIONS:
- Bachelor's degree in electrical engineering, computer engineering or computer science
- 5+ years of ASIC and/or physical design flow development experience in industry
PREFERRED SKILLS AND EXPERIENCE:
- Experience and deep understanding of SOC top level physical design flows (floor-planning, I/O, bump & RDL planning, hard IP integration, partitioning, power/ground grid generation, pin assignment, DFT, partition hardening, special clock handling, feedthrough flows, special interface/interconnect planning and implementation)
- Experience in IP integration (e.g. memories, I/O's, analog IPs, SerDes, DDR etc.)
- Deep expertise in DRC, LVS, PERC and ESD verification methodologies
- Hands-on proficiency with Calibre, ICV (IC Validator), or Pegasus
- Direct foundry DRM experience - able to read, interpret, and implement complex rule decks
- Experience at advanced nodes (4nm and below)
- Experience with large SOC designs (>10M gates) with frequencies in excess of 1GHZ
- Excellent scripting skills (csh/bash, Perl, Python TCL, Makefile etc.)
- Self-driven individual with a can-do attitude, and an ability to work in a dynamic group environment
ADDITIONAL REQUIREMENTS:
- Ability to work extended hours and weekends as needed to meet critical project milestones
COMPENSATION AND BENEFITS:
Pay range:
Physical Design Engineer/Senior: $170,000.00 - $235,000.00/per year
Your actual level and base salary will be determined on a case-by-case basis and may vary based on the following considerations: job-related knowledge and skills, education, and experience.
Base salary is just one part of your total rewards package at SpaceX. You may also be eligible for long-term incentives, in the form of company stock, stock options, or long-term cash awards, as well as potential discretionary bonuses and the ability to purchase additional stock at a discount through an Employee Stock Purchase Plan. You will also receive access to comprehensive medical, vision, and dental coverage, access to a 401(k) retirement plan, short & long-term disability insurance, life insurance, paid parental leave, and various other discounts and perks. You may also accrue 3 weeks of paid vacation & will be eligible for 10 or more paid holidays per year. Exempt employees are eligible for 5 days of sick leave per year.
ITAR REQUIREMENTS:
- Learn more about the ITAR here.
SpaceX is an Equal Opportunity Employer; employment with SpaceX is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.
Applicants wishing to view a copy of SpaceX's Affirmative Action Plan for veterans and individuals with disabilities, or applicants requiring reasonable accommodation to the application/interview process should reach out to
About SpaceX
Sourced by ZipRecruiter
Industry
Accounting services
Company size
1,001 - 5,000 Employees
Headquarters location
Hawthorne, CA, US
Year founded
2002