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Compiler Engineer Jobs in Colorado (NOW HIRING)

ASIC DFT Engineer

Fort Collins, CO · On-site

$108K - $172K/yr

Working closely with STA and DI Engineers design closure for test * Generating, Verifying ... Scan Insertion and scan compression background (DFT Compiler, Mentor TestKompress, etc.) * Logic ...

ASIC DFT Engineer

Fort Collins, CO · On-site

$108K - $172K/yr

Working closely with STA and DI Engineers design closure for test * Generating, Verifying ... Scan Insertion and scan compression background (DFT Compiler, Mentor TestKompress, etc.) * Logic ...

ASIC DFT Engineer

Fort Collins, CO · On-site

$108K - $172K/yr

Working closely with STA and DI Engineers design closure for test * Generating, Verifying ... Scan Insertion and scan compression background (DFT Compiler, Mentor TestKompress, etc.) * Logic ...

ASIC DFT Engineer

Fort Collins, CO · On-site

$108K - $172K/yr

Working closely with STA and DI Engineers design closure for test * Generating, Verifying ... Scan Insertion and scan compression background (DFT Compiler, Mentor TestKompress, etc.) * Logic ...

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Compiler Engineer information

See Colorado salary details

$34.7K

$93.8K

$149.3K

How much do compiler engineer jobs pay per year?

As of Jun 9, 2026, the average yearly pay for compiler engineer in Colorado is $93,778.00, according to ZipRecruiter salary data. Most workers in this role earn between $69,900.00 and $114,600.00 per year, depending on experience, location, and employer.

What are the typical daily responsibilities of a Compiler Engineer?

A typical day for a Compiler Engineer involves designing, implementing, and testing components of compilers or code analysis tools. You may work on optimizing code generation, fixing bugs, improving language support for modern hardware, or collaborating with other software engineers to integrate compilers into build systems and development environments. Compiler Engineers often review code, write technical documentation, and participate in design discussions with team members. This role requires a blend of independent research and active teamwork to solve complex engineering challenges and deliver reliable, high-performance software.

What are the key skills and qualifications needed to thrive in the Compiler Engineer position, and why are they important?

To thrive as a Compiler Engineer, you need a solid background in computer science, strong skills in programming languages such as C/C++, deep knowledge of compiler theory, and experience with code optimization or language design. Familiarity with build systems, LLVM or GCC toolchains, and source control systems is commonly required, and certifications such as a relevant computer science degree may be advantageous. Excellent problem-solving abilities, attention to detail, and effective collaboration and communication skills help set top candidates apart. These skills are essential for building robust, efficient compilers and collaborating effectively within software engineering teams.

How much does a compiler engineer make?

A compiler engineer's average salary in the industry typically ranges from $100,000 to $150,000 annually, depending on experience, location, and company size. Senior roles or those with specialized skills in programming languages and compiler design can earn higher salaries, often exceeding $160,000. Compensation may also include benefits such as bonuses, stock options, and professional development opportunities.

What does a Compiler Engineer do?

A Compiler Engineer designs, develops, and optimizes compilers, which are programs that translate high-level programming languages into machine code. They work on improving performance, ensuring efficient code generation, and implementing language features. Their role often involves working with hardware architectures, debugging complex issues, and enhancing compiler optimizations for speed and efficiency.

What do compiler engineers do?

Compiler engineers design, develop, and optimize software tools that translate programming languages into machine code. They work with programming languages, algorithms, and tools like LLVM or GCC to improve compiler performance, correctness, and features, often collaborating with software developers and testing for efficiency and reliability.
What are the most commonly searched types of Compiler Engineer jobs in Colorado? The most popular types of Compiler Engineer jobs in Colorado are:
What are popular job titles related to Compiler Engineer jobs in Colorado? For Compiler Engineer jobs in Colorado, the most frequently searched job titles are:
What cities in Colorado are hiring for Compiler Engineer jobs? Cities in Colorado with the most Compiler Engineer job openings:
Infographic showing various Compiler Engineer job openings in Colorado as of May 2026, with employment types broken down into 100% Full Time. Highlights an 100% In-person job distribution, with an average salary of $93,778 per year, or $45.1 per hour.
ASIC DFT Engineer

ASIC DFT Engineer

Broadcom, Inc.

Fort Collins, CO • On-site

$108K - $172K/yr

Full-time

Medical, Dental, Vision, Retirement, PTO

Posted 18 days ago


Broadcom rating

8.7

Company rating: 8.7 out of 10

Based on 23 frontline employees who took The Breakroom Quiz

11th of 139 rated electronics manufacturers


Job description

Please Note:
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Job Description:
Broadcom's ASIC Product Division (APD) is seeking candidates for a DFT position at our Fort Collins, Colorado, Development Center. The successful candidate will be responsible for leading DFT programs all the way from chip level DFT specification, through to implementation and verification culminating in successfully releasing products to production.
The candidate would be required to work on various phases of SoC DFT related activities for APD's designs - DFT Architecture, Test insertion and verification, Pattern generation, Coverage improvement, Post silicon debug and yield improvement to meet the product test metrics. It involves working with the Physical Design & STA team for DFT mode timing closure. The role could also involve direct interaction with external customers.
It is expected that you can code using TCL, PERL, RUBY, PYTHON, C++ or similar.
Responsibilities:
  • Understanding Broadcom & customer DFT feature requirements & DPPM goals & defining appropriate DFT specifications for the ASIC
  • Implementing DFT, including Scan, MBIST, TAP, LBIST, IO, SerDes and other I/P DFT integration
  • Candidate's primary responsibilities will be ATPG & Verification at chip level, Rapid bring-up at ATE and RMA support
  • Working closely with STA and DI Engineers design closure for test
  • Generating, Verifying & Debugging Test vectors before tape release.
  • Validating & Debugging Test vectors on ATE during the silicon bring up phase
  • Assisting with silicon failure analysis, diagnostics & yield improvement efforts
  • Interfacing with the customer, physical design and test engineering/manufacturing teams located globally
  • Working closely with I/P DFT engineers & other stakeholders
  • Debugging customer returned parts on the ATE
  • Innovating newer DFT solutions to solve testability problems in 3nm & beyond
  • Automating DFT & Test Vector Generation flows

Skills/Experience:
  • Strong DFT background (such as IO and Analog DFT, ATPG and/or Scan, BIST, and others)
  • Scan Insertion and scan compression background (DFT Compiler, Mentor TestKompress, etc.)
  • Logic BIST design and debug experience
  • Well-versed in ATPG vector generation, simulation, and debugging. (TetraMax, Fastscan)
  • Experience in Verilog coding, testbench generation & simulation
  • Memory BIST insertion and verification experience on embedded (SRAM, CAM, eDRAM, ROM)
  • Boundary scan Verification and test vector generation. Should have good knowledge in IEEE1149.1 and IEEE1149.6
  • Basic knowledge Test-STA and constraints
  • Strong background on IEE1687, IJTAG, ICL and PDL
  • The ability to work in a multi-disciplined, cross-department environment
  • Solid knowledge in analog and digital circuit design, and device physics fundamentals
  • Good understanding of Si processing, logical and physical synthesis, and transistor reliability principles
  • Excellent problem solving, debug, root cause analysis and communication skills
  • Strong understanding of statistical process control and data analysis techniques to drive silicon yield improvements and quality metrics
  • Project management capabilities to track and prioritize competing deliverables across cross-functional stakeholders including Test Engineering, Reliability, and Operations.
  • Experience working on ATE is a plus
  • Experience with Serdes, DDR, PCIE, ENET, CXL IOBIST verification and silicon debug is a plus
  • Experience working on Tessent SSN is a plus

Education & Experience:
  • Bachelors in Electrical/Electronic/Computer Engineering and 8+ years of relevant industry experience or Masters Degree in Electrical/Electronic/Computer Engineering and 6+ years of relevant industry experience

Additional Job Description:
Compensation and Benefits
The annual base salary range for this position is $108,000 - $172,800.
This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.
If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

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