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Coding Design Jobs (NOW HIRING)

campus4tech

Engineering Manager

Hermitage, TN · On-site

Stay hands-on with coding, design, and code reviews * Drive architecture, system design, and engineering best practices * Implement Agile, DevSecOps, and CI/CD methodologies * Collaborate with cross ...

Staffingine LLC

Java Developer

New York, NY · On-site

$55.75 - $72.25/hr

Handson Coding design and testing of changes in the Rates and Credit eTrading platform * Changes including ECN connectivity Pricing RFQ processing Pricing and STP * Focus on low latency capacity and ...

Raas Infotek LLC

Lead Java Full Stack Developer

Dallas, TX · On-site

$52.25 - $67.25/hr

Perform code reviews and ensure coding/design best practices. * Troubleshoot complex production issues and optimize application performance. * Collaborate with architects, product teams, QA, and ...

New

CEDENT

Golang Developer

Philadelphia, PA · On-site

Must Have Skills: * 5+ years of experience in GoLang for coding, design, and application performance. * Experience with major public cloud platforms, specifically AWS services like Lambda, EKS, SQS ...

Siri InfoSolutions Inc

Embedded Architect

Irving, TX · On-site

$166K/yr

Even better if worked in Data Mediation * 15+ years of hands-on experience- coding, design, architecture, testing. Key Words to search in Resume - Embedded Architect from Nokia, Samsung, Ericsson ...

Softpath System LLC

Java Developer

Plano, TX

$48.75 - $63.25/hr

Understanding of the design and development of the project lifecycle * Coding, Unit Testing and Component Integration Testing. * Creation and maintenance of system, functional and reference ...

Checkmate Savings Inc.

$90 - $130/hr

Code Leakage: finds leaked discount codes and replaces them with single-use ones. The combination ... Design, UX, and front-end live in one seat, so what you design is what our users get. You'll focus ...

New

Softpath System, LLC

Java Developer

Plano, TX · On-site

$48.75 - $63.25/hr

Understanding of the design and development of the project lifecycle * Coding, Unit Testing and Component Integration Testing. * Creation and maintenance of system, functional and reference ...

Photon

Tech Lead Microservices - Irving, TX

Irving, TX · On-site

Drive best practices in coding, design, and deployment. * Guide and mentor junior developers through code reviews, technical sessions, and task planning. * Ensure system scalability, performance ...

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Showing results 21-40

All JobsCoding Design Jobs

Coding Design information

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$15

$27

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How much do coding design jobs pay per hour?

As of Sep 4, 2026, the average hourly pay for coding design in the United States is $27.49, according to ZipRecruiter salary data. Most workers in this role earn between $18.99 and $34.62 per hour, depending on experience, location, and employer.

What is the difference between Coding Design vs UI Designer?

AspectCoding DesignUI Designer
Required CredentialsBasic coding skills, design principlesDesign tools, visual design skills
Work EnvironmentCollaborates with developers, tech teamsWorks closely with UX teams, clients
Industry UsageWeb development, app developmentApp interfaces, websites

While Coding Design involves creating visual layouts with coding skills, UI Designers focus on visual aesthetics and user experience design. Both roles often collaborate but differ in technical implementation versus visual concept creation.

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Coding Design jobs near you
Infographic showing various Coding Design job openings in the United States as of August 2026, with employment types broken down into 90% Full Time, 7% Part Time, and 3% Contract. Highlights an 85% Physical, 4% Hybrid, and 11% Remote job distribution, with an average salary of $57,182 per year, or $27.5 per hour.

Principal Mixed Signal RTL Design Engineer

TylSemi

San Jose, CA • On-site

$175K - $350K/yr

Full-time

Re-posted 20 days ago

Job description

About the role
  • Lead the micro-architecture and RTL design for Mixed-Signal chiplet focused on intelligent power optimization solutions for AI and high-performance computing.

What you'll do
  • Micro-architect and own toplevel RTL for Mixed-signal chip with analog circuits, micro-controller and other logic functions
  • Architect, and implement digital PID / cascade control loops (voltage-mode, current-mode, or hybrid) for high-frequency multi-phase IVRs.
  • Develop micro-architecture and implement RTL for control of mixed-signal circuits
  • Translate validated MATLAB/Simulink controller models into production-quality RTL (Verilog / SystemVerilog) using HDL Coder or manual high-quality coding.
  • Design and implement supporting digital blocks: ADC interface, DPWM (digital PWM),
  • Collaborate closely with analog designers on loop compensation, sensor design, quantization effects, and delay budgeting.
  • Analyze and optimize for area, power, timing, and metastability in the digital controller across PVT corners.
  • Support silicon bring-up, debug, and controller on lab hardware.

What We're Looking For
  • Strong mixed-signal background: Solid understanding of power circuits and digital control systems, digital filters etc.
  • Proven experience converting control algorithms into clean, synthesizable RTL (HDL Coder or hand-coded Verilog/SystemVerilog).
  • Deep knowledge of digital PID implementation challenges: quantization, sampling effects, computational delay, fixed-point arithmetic, and limit cycling.
  • Familiarity with high-frequency power converter control and digital PWM modulators (DPWM).
  • Experience with mixed-signal verification flows (analog-digital co-simulation).
  • Good understanding of analog effects impacting digital control: loop delay, sensor non-idealities, inductor non-linearities, PDN resonances.
  • Proficiency in digital design tools: Synopsys VCS, Verdi, Design Compiler, PrimeTime (or equivalent Cadence flow).
  • BSEE / MSEE or PhD with 8+ years of relevant experience in power management ICs or high-performance mixed-signal design.

Nice to Have
  • Prior experience designing digital controllers for integrated voltage regulators (IVRs), point-of-load (PoL) converters, or high-current AI/HPC power delivery.
  • Experience with formal verification or assertion-based mixed-signal verification.

About TylSemi, Inc.
The Opportunity
The AI infrastructure market is exploding. Every hyperscaler, every cloud provider, every AI company is building custom silicon. But they all face the same problem: how do you connect hundreds of chips, deliver clean power at scale, and move terabits of data without melting the package?
That's what we solve. TylSemi builds the chiplet infrastructure IP - the IO, power delivery, and interconnect building blocks - that makes AI/HPC systems actually work at scale.
This isn't a nice-to-have. It's the critical path.
Why Now
The Market Window
The semiconductor industry is going through its biggest architectural shift in 40 years:
• Moore's Law is dead. 2nm and beyond delivers marginal performance gains. The future is chiplets, not monolithic dies.
• Custom silicon is now mainstream. Google, Microsoft, Amazon, Meta, OpenAI - they're all designing their own ASICs. The $50B custom silicon market is growing 30% annually.
• IO and power are the bottleneck. Solve hard problems and provide something which is a category in itself.
Translation: We're entering the market at exactly the moment when every major AI/HPC player needs what we're building, and their alternatives are disappearing.
Culture & Team: How We Work
No Politics, No Bureaucracy
There are no layers, no approval chains, no corporate theater.
• If you have an idea, we test it. If it works, we ship it.
• No endless meetings, no PowerPoint presentations to convince middle management.
Remote-Friendly, Global Team
• US team: Bay Area preferred, but we hire the best people regardless of location
• India team: Building a world-class design center in Bangalore
Move Fast, Ship Real Products
We're not a research project. We have paying customers, committed capital, and aggressive timelines.
This is a company, not a lifestyle business. We're building to win.
What We Value
• Ownership mindset. You're not here to execute someone else's roadmap. You're here to define it.
• Bias for action. We move fast. Analysis paralysis doesn't fly here.
• Deep technical expertise. This is hard engineering. We need people who've shipped real silicon and debugged real hardware.
• Low ego, high standards. We don't care about titles or politics. We care about results.
The Ask
If you're reading this, you're probably comfortable. You have a good job at a stable company with all the benefits.
We're asking you to walk away from that and bet on us.
Here's why you should:
• The market is real. AI infrastructure spending is $200B+ annually and growing 40% YoY. Every hyperscaler needs what we're building.
• The team has done this before. We've built and exited semiconductor companies at scale. This isn't our first rodeo.
• The traction is de-risked. We have LOIs, strategic investors, and a clear path to revenue.
• The work is consequential. You're not optimizing someone's ad click-through rate. You're building the silicon infrastructure that powers AI.
This is the bet. Join us and build something that matters.
Or stay comfortable. No judgment.
But if you're the kind of person who wants to take the shot, we'd love to talk.
READY TO JOIN?
The pay range for this role is:
175,000 - 350,000 USD per year (San Jose (HQ))

Apply