... so engineers can drive complex tasks and cut ramp time. * Push the limits of what's possible in chip design with models and research harnesses on top of open-source foundations and iterating fast ...
... so engineers can drive complex tasks and cut ramp time. * Push the limits of what's possible in chip design with models and research harnesses on top of open-source foundations and iterating fast ...
Chip Lead / ASIC Director
San Jose, CA · On-site
$180 - $220/hr
A successful candidate will work with senior silicon design engineers, architects, and ... Chip Definition and Feasibility - identify critical trade‑offs and architectural decisions
Chip Lead / ASIC Director
San Jose, CA · On-site
$180 - $220/hr
A successful candidate will work with senior silicon design engineers, architects, and ... Chip Definition and Feasibility - identify critical trade‑offs and architectural decisions
Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. SR. FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING ...
Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. SR. FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING ...
ASIC Chip Design Lead
Saratoga, CA · On-site
$250K - $280K/yr
The company is in execution mode and has a world-class engineering team with decades of experience ... Position Overview We are seeking a hands-on ASIC Chip Design Lead to own chip design execution from ...
ASIC Chip Design Lead
Saratoga, CA · On-site
$250K - $280K/yr
The company is in execution mode and has a world-class engineering team with decades of experience ... Position Overview We are seeking a hands-on ASIC Chip Design Lead to own chip design execution from ...
Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. SR. FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING ...
Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. SR. FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING ...
Sr. Full Chip Physical Verification Engineer (Silicon Engineering)
Irvine, CA · On-site
$165K - $260K/yr
Medical
Dental
Vision
Life
Retirement
PTO
SR. FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband ...
Sr. Full Chip Physical Verification Engineer (Silicon Engineering)
Irvine, CA · On-site
$165K - $260K/yr
Medical
Dental
Vision
Life
Retirement
PTO
SR. FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband ...
Description As a Full Chip Integration Engineer, you will be participating in the physical design, integration, and verification of high performance, low power processor development. • Full chip ...
Description As a Full Chip Integration Engineer, you will be participating in the physical design, integration, and verification of high performance, low power processor development. • Full chip ...
Principal SoC Full-Chip Implementation Physical Design & Verification Engineer at Acara Solutio[...]
San Diego, CA · On-site
$220 - $240/hr
Principal SoC Full-Chip Implementation Physical Design & Verification Engineer job at Acara Solutions. San Diego, CA. Acara Solutions has been providing advanced manufacturing and technology firms ...
Principal SoC Full-Chip Implementation Physical Design & Verification Engineer at Acara Solutio[...]
San Diego, CA · On-site
$220 - $240/hr
Principal SoC Full-Chip Implementation Physical Design & Verification Engineer job at Acara Solutions. San Diego, CA. Acara Solutions has been providing advanced manufacturing and technology firms ...
Sr. Full Chip Physical Verification Engineer (Silicon Engineering)
Sunnyvale, CA · On-site
$175K - $280K/yr
Medical
Dental
Vision
Life
Retirement
PTO
Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. SR. FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING ...
Sr. Full Chip Physical Verification Engineer (Silicon Engineering)
Sunnyvale, CA · On-site
$175K - $280K/yr
Medical
Dental
Vision
Life
Retirement
PTO
Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. SR. FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING ...
Sr. Full Chip Physical Verification Engineer (Silicon Engineering)
Sunnyvale, CA · On-site
$175K - $280K/yr
Medical
Dental
Vision
Life
Retirement
PTO
SR. FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband ...
Sr. Full Chip Physical Verification Engineer (Silicon Engineering)
Sunnyvale, CA · On-site
$175K - $280K/yr
Medical
Dental
Vision
Life
Retirement
PTO
SR. FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband ...
Sr. Full Chip Physical Verification Engineer (Silicon Engineering)
Irvine, CA · On-site
$165K - $260K/yr
Medical
Dental
Vision
Life
Retirement
PTO
Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. SR. FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING ...
Sr. Full Chip Physical Verification Engineer (Silicon Engineering)
Irvine, CA · On-site
$165K - $260K/yr
Medical
Dental
Vision
Life
Retirement
PTO
Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. SR. FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING ...
Sr. Full Chip Physical Verification Engineer (Silicon Engineering)
Sunnyvale, CA · On-site
$175K - $280K/yr
Medical
Dental
Vision
Life
Retirement
PTO
Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. SR. FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING ...
Sr. Full Chip Physical Verification Engineer (Silicon Engineering)
Sunnyvale, CA · On-site
$175K - $280K/yr
Medical
Dental
Vision
Life
Retirement
PTO
Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. SR. FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING ...
Sr. Full Chip Physical Verification Engineer (Silicon Engineering)
Irvine, CA · On-site
$165K - $260K/yr
Medical
Dental
Vision
Life
Retirement
PTO
Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. SR. FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING ...
Sr. Full Chip Physical Verification Engineer (Silicon Engineering)
Irvine, CA · On-site
$165K - $260K/yr
Medical
Dental
Vision
Life
Retirement
PTO
Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. SR. FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING ...
Chip Lead / ASIC Director
San Jose, CA · On-site
$217K/yr
Serve as Engineering's interface to Technical Marketing; ensuring the product meets customer needs and supports the required functions and usage modes * Define/identify new device specific ...
Chip Lead / ASIC Director
San Jose, CA · On-site
$217K/yr
Serve as Engineering's interface to Technical Marketing; ensuring the product meets customer needs and supports the required functions and usage modes * Define/identify new device specific ...
Serve as Engineering's interface to Technical Marketing; ensuring the product meets customer needs ... The Chip Lead engages and resolves the problem when some aspect of the program is not meeting its ...
Serve as Engineering's interface to Technical Marketing; ensuring the product meets customer needs ... The Chip Lead engages and resolves the problem when some aspect of the program is not meeting its ...
We are hiring a Chip Firmware Validation Engineer to help us build the next generation of photonic AI processors and interconnects. In this role, you will be responsible for developing and validating ...
We are hiring a Chip Firmware Validation Engineer to help us build the next generation of photonic AI processors and interconnects. In this role, you will be responsible for developing and validating ...
Bachelor's degree in Electrical Engineering or Computer Science, or equivalent practical experience. * 8 years of technical experience in silicon timing closure and chip integration. * Experience in ...
Bachelor's degree in Electrical Engineering or Computer Science, or equivalent practical experience. * 8 years of technical experience in silicon timing closure and chip integration. * Experience in ...
Description As a Full Chip Integration Engineer, you will be participating in the physical design, integration, and verification of high performance, low power processor development. • Full chip ...
Description As a Full Chip Integration Engineer, you will be participating in the physical design, integration, and verification of high performance, low power processor development. • Full chip ...
Description As a Full Chip Integration Engineer, you will be participating in the physical design, integration, and verification of high performance, low power processor development. • Full chip ...
Description As a Full Chip Integration Engineer, you will be participating in the physical design, integration, and verification of high performance, low power processor development. • Full chip ...
As a software engineer, you will craft highly efficient software to automate and facilitate chip design and verification processes. What You'll be Doing: * Work as a team to build reliable, scalable ...
As a software engineer, you will craft highly efficient software to automate and facilitate chip design and verification processes. What You'll be Doing: * Work as a team to build reliable, scalable ...
Chip Engineer information
What is a chip engineer?
How much do chip engineers make in the US?
What are the key skills and qualifications needed to thrive as a chip engineer?
What is the difference between Chip Engineer vs Hardware Design Engineer?
| Aspect | Chip Engineer | Hardware Design Engineer |
|---|---|---|
| Required Credentials | Bachelor's or Master's in Electrical Engineering, Computer Engineering, or related fields | Bachelor's or Master's in Electrical Engineering, Computer Engineering, or related fields |
| Work Environment | Design labs, fabrication facilities, simulation software | Design labs, schematic tools, testing environments |
| Industry Usage | Semiconductor companies, electronics firms, tech companies | Electronics manufacturers, consumer device companies, aerospace |
| Common Search/Comparison | Yes | Yes |
Chip Engineers focus on designing and developing integrated circuits and chips, often working on the entire chip architecture. Hardware Design Engineers concentrate on creating detailed schematics and layouts for electronic hardware components, including circuit boards and systems. While both roles require similar educational backgrounds and work environments, Chip Engineers typically work more on the semiconductor level, whereas Hardware Design Engineers focus on the physical hardware implementation.
What are some typical challenges a chip engineer faces when working on new semiconductor designs?

Full-time
Posted 21 days ago
Nvidia rating
9.6
Based on 17 frontline employees who took The Breakroom Quiz
7th of 244 rated software companies
Job description
What you'll be doing:
- Apply LLMs, coding agents, and agentic systems - to core ASIC design problems: RTL generation, Design and Formal verification, PPA prediction and optimization.
- Hands-on experience with LLMs, RL, RLHF/RLAIF, post-training, evaluation, graders, synthetic data, model training, coding agents, tool-using agents, and production ML systems
- Deliver against NVIDIA's internal chip design schedules and activities - your success is measured by how much faster the ASIC teams move, not by research output alone.
- Build robust data generation (including synthetic data) and meticulous evaluation methodology that separates working systems from demos and use evaluation to decide what to automate next.
- Wire coding agents and agentic AI into EDA and validation flows - simulation, regressions, waveform and log analysis, script generation - so engineers can drive complex tasks and cut ramp time.
- Push the limits of what's possible in chip design with models and research harnesses on top of open-source foundations and iterating fast from prototype to production.
- Partner closely with NVIDIA's internal Nemotron team to improve our models with domain-specific data, feedback, and post-training, feeding ASIC-design expertise back into the models.
What we need to see:
- MS or PhD or equivalent experience in Computer Science, Electrical/Computer Engineering, or related field.
- 8+ years of proven industry experience
- Domain and technical expertise in front-end ASIC (design, verification, timing) combined with project experience applying agentic AI to chip design and optimization problems, with a track record of driving ideas from conception through experimentation to production.
- Hands-on experience building LLM-based agents or AI tooling that real users depend on context engineering, tool integration, orchestration, and failure analysis, with a focus on evaluation.
- Experience with custom model training, fine-tuning, or post-training (SFT, RLHF/DPO) over proprietary technical data.
- Excellent self-motivation, creativity, and a passion for applied research, plus tight-knit collaboration skills and the ability to work effectively within a team.
- Experience building and maintaining infrastructure (Docker, Slurm, CI/CD, etc.).
- Excellent written and verbal communication, with proven experience presenting and explaining complex technical work.
#LI-Hybrid
Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 192,000 USD - 304,750 USD for Level 4, and 224,000 USD - 356,500 USD for Level 5.
You will also be eligible for equity and benefits.
Applications for this job will be accepted at least until July 27, 2026.
This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.
NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.
About Nvidia
Sourced by ZipRecruiter
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology--and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Santa Clara, CA, US
Year founded
1993