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Chip Architect Jobs in Minnesota (NOW HIRING)

Key Responsibilities 1. Semiconductor IP Protection Implement least privilege access to safeguard sensitive chip design files, EDA tools, and proprietary engineering data. Architect IAM for ...

Concrete Finisher (Union)

Rosemount, MN

$21.25 - $29.25/hr

... architectural structures. Grinds and patches on walls, abutments, and piers. Year round and ... Grind and chip seams and plug holes on vertical walls * Other various duties as assigned ...

Concrete Finisher (Union)

Minneapolis, MN · On-site

$21.75 - $29.75/hr

... architectural structures. Grinds and patches on walls, abutments, and piers. Year round and ... Grind and chip seams and plug holes on vertical walls * Other various duties as assigned ...

Welder

Duluth, MN

$29 - $40/hr

Chip or grind off excess weld, slag or spatter using hand scrapers or power chippers, portable ... All welding on non-critical piping assemblies, structural and architectural assemblies, and any ...

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Showing results 1-20

Chip Architect information

See Minnesota salary details

$45.5K

$126.1K

$197.4K

How much do chip architect jobs pay per year?

As of Sep 3, 2026, the average yearly pay for chip architect in Minnesota is $126,105.00, according to ZipRecruiter salary data. Most workers in this role earn between $89,100.00 and $162,600.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a chip architect?

To thrive as a Chip Architect, you need deep expertise in computer architecture, digital circuit design, and strong analytical skills, usually supported by an advanced degree in electrical engineering or a related field. Familiarity with hardware description languages (like Verilog or VHDL), EDA tools, and simulation platforms is essential, along with knowledge of industry-standard protocols. Strong problem-solving abilities, effective communication, and leadership skills set outstanding chip architects apart when collaborating across multidisciplinary teams. These competencies are crucial for designing efficient, innovative chips that meet performance, power, and cost requirements in a highly competitive technology industry.

What are some common challenges faced by chip architects when translating system requirements into chip designs?

Chip Architects often face the challenge of balancing performance, power consumption, and cost constraints while translating high-level system requirements into detailed chip architectures. They must ensure that their designs can be efficiently implemented in silicon, taking into account factors like manufacturability, scalability, and integration with existing hardware and software. Collaborating closely with cross-functional teams—such as hardware, software, and verification engineers—is essential to address issues early and ensure alignment throughout the development process. Staying updated with rapidly evolving semiconductor technologies and industry standards is also a key part of overcoming these challenges.

What is the difference between Chip Architect vs Hardware Design Engineer?

AspectChip ArchitectHardware Design Engineer
Required CredentialsBachelor's or Master's in Electrical Engineering, Computer Engineering, or related fields; experience in chip design and architectureBachelor's or Master's in Electrical Engineering, Computer Engineering, or related fields; focus on circuit design and implementation
Work EnvironmentDesign teams, R&D labs, collaborative project settingsDesign labs, testing facilities, manufacturing environments
Employer & Industry UsageSemiconductor companies, tech firms, integrated circuit manufacturersElectronics companies, semiconductor firms, hardware development labs

The main difference is that a Chip Architect focuses on designing the overall architecture and high-level specifications of chips, while a Hardware Design Engineer concentrates on implementing circuit designs based on specifications. Both roles require electrical engineering expertise, but the Chip Architect is more involved in conceptual and architectural decisions, whereas the Hardware Design Engineer handles detailed circuit development and testing.

What does a chip architect do?

A chip architect designs the overall structure and specifications of integrated circuits, including processors and other hardware components. They analyze performance requirements, create architectural models, and collaborate with engineers to ensure the design meets technical and functional goals, often using tools like CAD software and simulation environments.

What are popular job titles related to Chip Architect jobs in Minnesota?

For Chip Architect jobs in Minnesota, the most frequently searched job titles are:

What job categories do people searching Chip Architect jobs in Minnesota look for?

The top searched job categories for Chip Architect jobs in Minnesota are:

What cities in Minnesota are hiring for Chip Architect jobs?

Cities in Minnesota with the most Chip Architect job openings:

Asic Chip Lead-Full Time- Onsite

Technical Link

Brooklyn Park, MN • On-site

$145K - $205K/yr

Other

Posted 7 days ago


Job description

Asic Chip Lead-Full Time- Onsite Brooklyn Park, MN

As an ASIC Chip Lead and Design Engineer, you will play a pivotal role in the development of custom-designed Application-Specific Integrated Circuits (ASICs). Your expertise will span the entire chip design lifecycle, from conceptualization to implementation. You’ll collaborate with cross-functional teams, ensuring successful chip development while adhering to performance, power, and area targets. The right candidate will be someone with high aptitude who is currently hands on designing complex digital blocks, with strong knowledge/experience across the complete ASIC/SOC design flow. An ideal candidate will additionally have experience with radiationhardened design, analog/mixed-signal design and EDA, and std-cell library development. 

Additional duties include the evaluation of customer requirements and estimates of effort/expenses for potential new business, and participation in identifying problems with and improvements to, internal design methodologies.

Essential Duties and Qualifications:

  • Chip Architecture and Development:
    • Lead the architectural design of ASICs based on high-level requirements and block diagrams.
    • Collaborate with system architects to define chip functionality, interfaces, and performance targets.
    • Develop detailed specifications for the chip’s components.
  • RTL Design and Synthesis:
    • Use Synopsys Design Compiler to create RTL (Register Transfer Level) designs.
    • Optimize RTL code for area, power, and performance.
    • Implement and verify complex digital blocks.
  • Constraint Development:
    • Develop timing constraints for the entire chip.
    • Work closely with physical design teams to ensure successful place-and-route.  RISC Processor Conformance:
    • Constrain and verify RISC processors within the chip. o Optimize processor performance and power efficiency.
  • Physical Design Collaboration:
    • Collaborate with physical design teams on floorplanning, placement, and routing.
    • Address any design closure issues.
  • Verification Support:
    • Work with verification engineers to ensure functional correctness.
    • Assist in creating testbenches and verifying the chip’s functionality.
  • Modern revision-control tools and best-practices in a collaborative, multi-site design community.
  • Proficiency with UNIX/Linux incl. shell scripting, text utilities (e.g. sed, awk, grep), using Modules, high-level programming such as C/C++, PERL/Python/TCL scripting.
  • Proficiency with Windows apps, incl. Word, Excel, PowerPoint, Visio, Project, PDF conversion.

Qualifications:

  • Bachelors/master’s in electrical engineering/computer science or equivalent.
  • 10+ years of direct industry experience with ASIC and/or SoC design.
  • Proficiency in Synopsys Design Compiler and other EDA tools.
  • Strong understanding of digital design principles.
  • Familiarity with RISC architectures (e.g., ARM, MIPS).
  • Excellent problem-solving skills and attention to detail.
  • A strong background in RTL based digital IC design using Verilog/SystemVerilog             Proven track record of first-pass successes.
  • A self-starter with the ability to assume leadership roles.
  • Ability to work well in a diverse team environment.
  • Willingness to Mentor less senior engineers.
  • Experience with industry standard development tools and methodologies.

Target annual salary: 

  • The US base salary range for this full-time position is $145,000-$205,000.

Location:  

  • Work on-site at the TSS office in Brooklyn Park, MN.