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Cad Eda Engineer Jobs (NOW HIRING)

CAD/EDA Manager

San Jose, CA · On-site

$220K - $255K/yr

Instead of traditional electronic circuits, we use silicon photonics and an active, programmable ... Position Overview We are seeking an experienced CAD Manager to lead and manage the EDA tooling ...

PE CAD Engineering

San Jose, CA · On-site

$126K - $234K/yr

As a CAD Infrastructure Engineer, the candidate will be reporting to the Director of CAD. In this ... The CAD team is spread globally across the US and India and supports EDA (electronic design ...

Develop, maintain, and enhance EDA/CAD flows for ASIC design (RTL GDSII lifecycle exposure ... Improve productivity by automating repetitive engineering tasks and optimizing workflows * Ensure ...

Role: In your role as a Staff CAD Engineer (Infrastructure), you will support and improve CAD ... This position emphasizes EDA compute infrastructure. You will play a critical role in improving the ...

Role: In your role as a Staff CAD Engineer (Infrastructure), you will support and improve CAD ... This position emphasizes EDA compute infrastructure. You will play a critical role in improving the ...

The job opening is for a full-time Electronic Design Automation (EDA) CAD Engineer in the Design Group in Western Digital's research department. The role will be a part of a multi-functional team ...

EDA- CAD Engineer

San Jose, CA · On-site

$145K - $194K/yr

The job opening is for a full-time Electronic Design Automation (EDA) CAD Engineer in the Design Group in Western Digital's research department. The role will be a part of a multi-functional team ...

The job opening is for a full-time Electronic Design Automation (EDA) CAD Engineer in the Design Group in Western Digital's research department. The role will be a part of a multi-functional team ...

Work closely with design teams and CAD/EDA stakeholders to identify workflow bottlenecks across the ... Strong programming skills, with Python required; experience with shell, Tcl, or Perl as needed

The ideal candidate brings hands-on expertise in EDA tools and semiconductor design flows, thriving ... Document CAD flows and provide training to engineering teams Minimum Qualifications: * B.S. degree ...

The ideal candidate brings hands-on expertise in EDA tools and semiconductor design flows, thriving ... Document CAD flows and provide training to engineering teams Minimum Qualifications: * B.S. degree ...

Sr. EDA Flow Engineer

Santa Clara, CA · On-site

$110K - $145K/yr

Work closely with design teams and CAD/EDA stakeholders to identify workflow bottlenecks across the ... Strong programming skills, with Python required; experience with shell, Tcl, or Perl as needed

Sr. EDA Flow Engineer

Santa Clara, CA · On-site

$110K - $145K/yr

Work closely with design teams and CAD/EDA stakeholders to identify workflow bottlenecks across the ... Strong programming skills, with Python required; experience with shell, Tcl, or Perl as needed

You'll collaborate closely with design engineers, CAD teams, and EDA vendors to architect robust automation frameworks, simplify project bring-up, and enable smooth, efficient execution of complex ...

Senior VLSI CAD Software Engineer

Hillsboro, OR · On-site

$133K - $175K/yr

They are seeking a talented Software Engineer to build custom, high-impact VLSI CAD software ... in CAD/EDA tool development • Skill in CAD data structures and algorithms, especially for ...

Senior VLSI CAD Software Engineer

Westford, MA · On-site

$127K - $167K/yr

They are seeking a talented Software Engineer to build custom, high-impact VLSI CAD software ... in CAD/EDA tool development • Skill in CAD data structures and algorithms, especially for ...

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Cad Eda Engineer information

See salary details

$44K

$93.1K

$151K

How much do cad eda engineer jobs pay per year?

As of Jun 19, 2026, the average yearly pay for cad eda engineer in the United States is $93,130.00, according to ZipRecruiter salary data. Most workers in this role earn between $70,000.00 and $119,500.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a CAD EDA Engineer, and why are they important?

To thrive as a CAD EDA Engineer, you need a strong background in electronic engineering, proficiency in digital and analog circuit design, and typically a degree in electrical engineering or a related field. Familiarity with EDA tools such as Cadence, Synopsys, or Mentor Graphics, and scripting in languages like Python, Perl, or TCL is essential. Strong analytical thinking, attention to detail, and effective communication are key soft skills for collaborating with cross-functional teams and solving complex design challenges. These skills and qualities are critical for ensuring accurate, efficient, and innovative electronic design automation processes.

What are CAD EDA Engineers?

CAD EDA Engineers are professionals who specialize in developing, maintaining, and supporting computer-aided design (CAD) and electronic design automation (EDA) tools used in the design and verification of electronic circuits and systems. They work closely with design teams to automate design processes, improve design flows, and ensure that tools and methodologies are efficient and up to date. Their work enables the creation of complex integrated circuits, printed circuit boards, and other electronic devices by providing reliable software and workflows for engineers. CAD EDA Engineers often have strong backgrounds in software programming, digital design, and semiconductor technology.

What are some common challenges faced by CAD EDA Engineers when collaborating with cross-functional teams?

CAD EDA Engineers often work closely with design, verification, and software teams, which can present challenges in aligning requirements and timelines. Differences in tool preferences, data formats, and project priorities may require strong communication and negotiation skills. It's essential to stay adaptable and proactively address integration issues to ensure smooth workflow and successful project delivery.

What is the difference between Cad Eda Engineer vs PCB Design Engineer?

AspectCad Eda EngineerPCB Design Engineer
CredentialsBachelor's in Electrical Engineering or related; certifications in EDA toolsBachelor's in Electrical Engineering, Electronics, or related; certifications in PCB design tools
Work EnvironmentDesign firms, semiconductor companies, electronics manufacturersConsumer electronics, aerospace, automotive, and industrial sectors
Industry UsageUsed across semiconductor, electronics, and hardware design industriesPrimarily in electronics product development and manufacturing

While both roles involve electronic design, a Cad Eda Engineer focuses on developing and validating electronic design automation tools and workflows, whereas a PCB Design Engineer specializes in creating printed circuit board layouts. Both roles require similar technical skills and certifications but differ in their specific focus within the electronics design process.

More about Cad Eda Engineer jobs
What cities are hiring for Cad Eda Engineer jobs? Cities with the most Cad Eda Engineer job openings:
What states have the most Cad Eda Engineer jobs? States with the most job openings for Cad Eda Engineer jobs include:
Infographic showing various Cad Eda Engineer job openings in the United States as of June 2026, with employment types broken down into 50% Full Time, and 50% Part Time. Highlights an 87% Physical, 5% Hybrid, and 8% Remote job distribution, with an average salary of $93,130 per year, or $44.8 per hour.

CAD/EDA Manager

Neurophos Inc

San Jose, CA • On-site

$220K - $255K/yr

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Posted 10 days ago


Job description

About Neurophos
The demand for new datacenters and AI compute is rapidly outpacing the planet's energy capacity. Digital solutions are hitting a power wall as we approach the physical limits of traditional silicon. Conquering this bottleneck isn't about bigger chips or more of them; it means rethinking the fundamental architecture. The industry's current path isn't going to meet the need, so we took a different approach.
Instead of traditional electronic circuits, we use silicon photonics and an active, programmable metasurface to perform matrix multiplications at the speed of light. Our optical cells are 10,000x smaller than traditional photonic components, enabling unprecedented density. By using photonics instead of electricity, our chips become more efficient as they scale. This architecture will deliver up to 100 times the energy efficiency of existing solutions while significantly improving performance for large-scale AI inference.
We've assembled a world-class team of industry veterans and recently raised a $110M Series A led by Gates Frontier. Participants include M12 (Microsoft's Venture Fund), Carbon Direct Capital, Aramco Ventures, Bosch Ventures, Tectonic Ventures, Space Capital, and others. We have also been recognized on the EE Times Silicon 100 list for several consecutive years.
Join us and shape the future of computing!
Position Overview
We are seeking an experienced CAD Manager to lead and manage the EDA tooling, design flows, and physical design infrastructure for our analog and mixed-signal IC design teams. In this role, you will be responsible for evaluating and deploying EDA tools, developing robust custom flows from schematic capture through tape-out, and ensuring maximum designer productivity across multiple process nodes. You will work closely with design, verification, and process engineering teams to solve the toughest implementation challenges in advanced analog design.
Location
Austin, TX or San Jose, CA. Full-time onsite position.
Key Responsibilities
EDA Tool and Flow Management
  • Evaluate, deploy, and support EDA tools, including Cadence Virtuoso, Spectre, Calibre, and related analog/custom IC toolsets.
  • Develop, maintain, and optimize design flows for schematic entry, simulation, layout, parasitic extraction (PEX), and physical verification (DRC/LVS).
  • Manage EDA tool licenses, vendor relationships, and tool upgrade cycles to ensure the design team's productivity.
  • Implement and maintain PDK installations and updates, coordinating with foundry partners (including TSMC) for process node enablement, with specific focus on advanced technology qualification and ramp.
  • Lead CAD enablement for TSMC N3P and N2P advanced nodes, including PDK bring-up, design rule updates, fill strategy, and integration / sign-off flow alignment with TSMC requirements.
  • Interface with foundries and VCA partners to facilitate a smooth tape-out process.

Infrastructure and Automation
  • Architect and maintain the CAD computing environment, including Linux workstations, EDA servers, and LSF/grid computing clusters.
  • Develop and maintain SKILL, Tcl, Python, and shell scripts to automate repetitive CAD tasks and streamline designer workflows.
  • Manage design data integrity through version control systems (Git, Vault, ClearCase) and define backup and archive strategies.
  • Collaborate with IT to plan compute resource needs, capacity planning, and infrastructure upgrades.

Team Leadership and Collaboration
  • Act as the primary technical liaison between design teams, foundries, and EDA vendors.
  • Define and enforce CAD best practices, design methodology guidelines, and tape-out checklists.
  • Provide hands-on debug support for flow and tool issues during critical project phases and tape-out windows.
  • Drive continuous improvement initiatives to reduce design cycle time and improve first-pass silicon success rates.

Qualifications
  • B.S. or M.S. in Electrical Engineering, Computer Engineering, or a closely related field.
  • 8+ years of hands-on experience in analog/mixed-signal IC CAD or EDA engineering.
  • Deep expertise in Cadence Virtuoso suite (schematic, layout, ADE), Spectre/Spectre X simulation, and Cadence Virtuoso SKILL scripting.
  • Strong knowledge of physical verification tools: Mentor Calibre (DRC, LVS, PEX) and/or Synopsys IC Validator.
  • Proven experience with PDK integration and support for advanced CMOS nodes; hands-on experience with TSMC N3P and/or N2P process nodes strongly preferred.
  • Familiarity with TSMC design rule documents (DRM), analog design guidelines (ADG), and tape-out sign-off requirements for N3P/N2P.
  • Proficiency in at least two scripting languages: Python, SKILL, Tcl, or Perl.
  • Experience managing EDA tool licensing (FlexLM/RLM) and floating license optimization.
  • Strong understanding of Linux/Unix computing environments and HPC cluster management.

Preferred Skills
  • Experience with custom digital/mixed-signal flows, including OpenAccess, Virtuoso Layout Suite XL, or Virtuoso RF.
  • Familiarity with post-layout simulation (EMIR, noise, reliability) methodologies.
  • Knowledge of EM/IR analysis tools (Voltus, RedHawk) applied to analog/custom blocks.
  • Prior people management or technical lead experience in a tape-out-oriented environment.
  • Experience with high-speed I/O, SerDes, PLLs, or RF circuit design CAD flows.
  • Familiarity with configuration management tools and agile project tracking (SOS, JIRA, Confluence).

What We Offer
This is an opportunity to play a pivotal role in an innovative startup redefining the future of AI hardware. Work on a game-changing technology at the intersection of photonics and AI as part of a collaborative and brilliant team. You'll contribute to a platform that redefines computational performance and accelerates the future of artificial intelligence. Come help us bring this transformative technology to the world.
Benefits
Join a team that invests in your future and your well-being. At Neurophos, we offer:
  • 100% coverage of base health plan premiums for you and your dependents, plus HSA contributions.
  • Unlimited PTO. No rigid vacation banks, just a focus on delivery.
  • 401(k) matching and stock option opportunities to ensure our success is your success.
  • Full suite of voluntary benefits, including Dental, Vision, Life, Hospital, Critical Illness, and Accident insurance.
  • Personalized Benefits. Choose the plans that fit your life and take the cash back for those that don't.