1

Cad Eda Methodology Engineer Jobs (NOW HIRING)

The ideal candidate will have strong experience with CAD engineering, design methodology, low-power design, ASIC flows, and EDA tools, along with the ability to troubleshoot complex technical ...

EDA / CAD Engineer

Austin, TX ยท Remote

$150K - $260K/yr

Mythic is looking for an experienced CAD/EDA engineer to build a truly robust design environment ... Mythic takes EDA methodology and tooling seriously, and is poised for rapid growth. You will be a ...

EDA / CAD Engineer

Palo Alto, CA ยท Remote

$150K - $260K/yr

Mythic is looking for an experienced CAD/EDA engineer to build a truly robust design environment ... Mythic takes EDA methodology and tooling seriously, and is poised for rapid growth. You will be a ...

EDA / CAD Engineer

Palo Alto, CA ยท On-site

$150K - $260K/yr

Mythic is looking for an experienced CAD/EDA engineer to build a truly robust design environment ... Mythic takes EDA methodology and tooling seriously, and is poised for rapid growth. You will be a ...

EDA / CAD Engineer

Palo Alto, CA ยท On-site

$150K - $260K/yr

Mythic is looking for an experienced CAD/EDA engineer to build a truly robust design environment ... Mythic takes EDA methodology and tooling seriously, and is poised for rapid growth. You will be a ...

Be Seen First

This individual will drive roadmap development for CAD, EDA, smart design methodologies, and PDK automation while optimizing engineering productivity. What You'll Do Design Enablement Strategy ...

This individual will drive roadmap development for CAD, EDA, smart design methodologies, and PDK automation while optimizing engineering productivity. What You'll Do * Define and execute the ...

CAD/EDA Tools Automation Engineer

Hillsboro, OR ยท On-site

$111K - $211K/yr

In this role, you will design, develop, test, and debug software tools, flows, and methodologies ... Support the administration, deployment, and maintenance of CAD software and EDA tool infrastructure.

Develop, maintain, and enhance EDA/CAD flows for ASIC design (RTL GDSII lifecycle exposure ... Improve productivity by automating repetitive engineering tasks and optimizing workflows * Ensure ...

CAD/EDA Tools Automation Engineer

Hillsboro, OR ยท On-site

$111K - $211K/yr

... EDA Tools Automation Engineerto join our growing engineering team ... In this role, you will design, develop, test, and debug software tools, flows, and methodologies ...

next page

Showing results 1-20

Cad Eda Methodology Engineer information

See salary details

$44K

$93.1K

$151K

How much do cad eda methodology engineer jobs pay per year?

As of Sep 11, 2026, the average yearly pay for cad eda methodology engineer in the United States is $93,130.00, according to ZipRecruiter salary data. Most workers in this role earn between $70,000.00 and $119,500.00 per year, depending on experience, location, and employer.

What are popular job titles related to Cad Eda Methodology Engineer jobs?

For Cad Eda Methodology Engineer jobs, the most frequently searched job titles are:

Infographic showing various Cad Eda Methodology Engineer job openings in the United States as of June 2026, with employment types broken down into 25% Full Time, and 75% Contract. Highlights an 91% Physical, 4% Hybrid, and 5% Remote job distribution, with an average salary of $93,130 per year, or $44.8 per hour.

CAD Engineering & Design Methodology Engineer

Austin, TX โ€ข On-site

Other

Posted 15 days ago


Job description

We strive to be Your Future, Your Solution to accelerate your career!

CAD Engineering & Design Methodology Engineer Position Overview

We are seeking a CAD Engineering & Design Methodology Engineer to help develop and execute technical roadmaps for next-generation design tools, flows, and methodologies. This role will focus on enabling power-efficient, scalable GPU, CPU, and complex SoC designs across advanced semiconductor process nodes. The ideal candidate will have strong experience with CAD engineering, design methodology, low-power design, ASIC flows, and EDA tools, along with the ability to troubleshoot complex technical challenges and drive methodology improvements across design teams.

Key Responsibilities
  • Develop and execute technical roadmaps for CAD engineering, design enablement, and methodology improvements.
  • Contribute to the development of next-generation tools, design flows, and methodologies for advanced GPU, CPU, and SoC designs.
  • Develop robust automation solutions and troubleshoot complex CAD tools, design flows, and methodology issues.
  • Promote consistent adoption of design best practices across engineering organizations.
  • Support low-power design enablement at scale, including methodologies for: Power analysis Power optimization Power verification Power signoff.
  • Collaborate closely with RTL, verification, physical design, and design-technology co-optimization (DTCO) teams.
  • Partner with internal engineering organizations and external EDA vendors to leverage tool capabilities, resolve systemic design challenges, and improve technology readiness.
  • Lead and contribute to moderate-to-complex technical projects from definition through implementation.
  • Identify opportunities to improve design productivity, quality, scalability, and efficiency.
  • Develop and maintain technical documentation, methodologies, and best practices.
  • Stay current with emerging GPU, ASIC, verification, power, and semiconductor design technologies.
Required Qualifications

Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or a related technical field with 6+ years of relevant experience; or Master's degree with 4+ years of relevant experience; or Ph.D. with 2+ years of relevant experience. 6+ years of hands-on experience in CAD engineering, design methodology, or design enablement supporting GPU, CPU, or complex SoC programs. Strong working knowledge of low-power design tools and methodologies, including RTL- and gate-level power analysis, optimization, and signoff. Experience with tools such as PrimePower, PowerArtist, Empower, Joules, RTL-Architect, or equivalent technologies. Strong understanding of the end-to-end ASIC design flow, including: RTL design and verification Synthesis Physical design Timing analysis Power analysis and optimization EMIR analysis DTCO considerations Hands-on experience with CAD/EDA tools supporting simulation, synthesis, linting, and verification. Experience with major EDA platforms, such as Synopsys, Cadence, or Siemens EDA/Mentor Graphics. Hands-on experience with EMIR analysis tools and methodologies, including transistor-, gate-, and package-level analysis. Experience with tools such as RedHawk, Totem, Voltus, or equivalent. Strong analytical, troubleshooting, and problem-solving skills with a data-driven approach. Excellent communication and collaboration skills. Ability to navigate ambiguity, manage competing priorities, and maintain ownership in a fast-paced engineering environment.

Preferred Experience
  • Experience supporting advanced-node semiconductor design programs.
  • Background in GPU, CPU, or high-performance SoC architecture and implementation.
  • Experience developing scalable CAD automation and design methodologies.
  • Experience working directly with EDA vendors to evaluate, debug, and optimize tool capabilities.
  • Strong understanding of power-performance-area (PPA) optimization and design-technology co-optimization.
Company Culture

Saige Partners, one of the fastest growing technology and talent companies in the Midwest, believes in people with a passion to help them succeed. We are in the business of helping professionals Build Careers, Not Jobs. Saige Partners believes employees are the most valuable asset to building a thriving and successful company culture, which is why we offer a benefit package and convenient weekly payment solutions that helps our employees stay healthy and maintain a positive work/life balance.

  • benefit package
  • convenient weekly payment solutions that helps our employees stay healthy and maintain a positive work/life balance.

Learn more about Saige Partners on Facebook or LinkedIn.

#J-18808-Ljbffr