These systems power groundbreaking NVIDIA products such as Grace-CPU-Superchip, Grace-Hopper ... Master's degree in electrical engineering, Computer Engineering, Computer Science, or equivalent ...
These systems power groundbreaking NVIDIA products such as Grace-CPU-Superchip, Grace-Hopper ... Master's degree in electrical engineering, Computer Engineering, Computer Science, or equivalent ...
ASIC Design Engineer - Cache Controller
Santa Clara, CA · On-site
$184K - $324K/yr
Explore architecture trade-offs in system performance, area, and power consumption. Develop and debug register-transfer level (RTL) design of various sections in the cache subsystem. Work on ...
ASIC Design Engineer - Cache Controller
Santa Clara, CA · On-site
$184K - $324K/yr
Explore architecture trade-offs in system performance, area, and power consumption. Develop and debug register-transfer level (RTL) design of various sections in the cache subsystem. Work on ...
We are looking for an experienced engineer who can drive CPU multi-level cache subsystem architecture and RTL development for multi-processor systems. Description As a CPU Cache Microarchitect/RTL ...
We are looking for an experienced engineer who can drive CPU multi-level cache subsystem architecture and RTL development for multi-processor systems. Description As a CPU Cache Microarchitect/RTL ...
We are looking for an experienced engineer who can drive CPU multi-level cache subsystem architecture and RTL development for multi-processor systems. Description As a CPU Cache Microarchitect/RTL ...
We are looking for an experienced engineer who can drive CPU multi-level cache subsystem architecture and RTL development for multi-processor systems. Description As a CPU Cache Microarchitect/RTL ...
Ambient Compute System Architecture and Power Engineer
San Diego, CA · On-site
$148K - $222K/yr
Engineering Group, Engineering Group > Multimedia Systems General Summary: As part of Qualcomm ... Perform detailed data-path and memory-access analysis (cache, SRAM, DDR) to identify bottlenecks ...
Ambient Compute System Architecture and Power Engineer
San Diego, CA · On-site
$148K - $222K/yr
Engineering Group, Engineering Group > Multimedia Systems General Summary: As part of Qualcomm ... Perform detailed data-path and memory-access analysis (cache, SRAM, DDR) to identify bottlenecks ...
We are looking for an experienced engineer who can drive CPU multi-level cache subsystem architecture and RTL development for multi-processor systems. Description As a CPU Cache Microarchitect/RTL ...
We are looking for an experienced engineer who can drive CPU multi-level cache subsystem architecture and RTL development for multi-processor systems. Description As a CPU Cache Microarchitect/RTL ...
We are looking for an experienced engineer who can drive CPU multi-level cache subsystem architecture and RTL development for multi-processor systems. Description As a CPU Cache Microarchitect/RTL ...
We are looking for an experienced engineer who can drive CPU multi-level cache subsystem architecture and RTL development for multi-processor systems. Description As a CPU Cache Microarchitect/RTL ...
Staff Security Engineer
California, MO · On-site
... systems, and KV cache-based data services. This is an architecture role focused on working closely with engineering teams across the data path, control plane, and ecosystem/protocol domains to ensure ...
Staff Security Engineer
California, MO · On-site
... systems, and KV cache-based data services. This is an architecture role focused on working closely with engineering teams across the data path, control plane, and ecosystem/protocol domains to ensure ...
We are currently looking for a InterSystems IRIS / Caché Database Administrator for a 100% remote ... Bachelor's degree in Computer Science, Information Systems, Engineering, or a related technical ...
New
We are currently looking for a InterSystems IRIS / Caché Database Administrator for a 100% remote ... Bachelor's degree in Computer Science, Information Systems, Engineering, or a related technical ...
New
We are currently looking for a InterSystems IRIS / Caché Database Administrator for a 100% remote ... Bachelor's degree in Computer Science, Information Systems, Engineering, or a related technical ...
We are currently looking for a InterSystems IRIS / Caché Database Administrator for a 100% remote ... Bachelor's degree in Computer Science, Information Systems, Engineering, or a related technical ...
We are currently looking for a InterSystems IRIS / Cache Database Administrator for a 100% remote ... Bachelor's degree in Computer Science, Information Systems, Engineering, or a related technical ...
We are currently looking for a InterSystems IRIS / Cache Database Administrator for a 100% remote ... Bachelor's degree in Computer Science, Information Systems, Engineering, or a related technical ...
We are currently looking for a InterSystems IRIS / Caché Database Administrator for a 100% remote ... Bachelor's degree in Computer Science, Information Systems, Engineering, or a related technical ...
New
We are currently looking for a InterSystems IRIS / Caché Database Administrator for a 100% remote ... Bachelor's degree in Computer Science, Information Systems, Engineering, or a related technical ...
New
W2 Only :: Cache Developer in Lenexa, KS (100% Remote) :: Must Have 8+ Years Exp. E
Lenexa, KS · On-site
Job Title - Cache Developer Location - Lenexa, KS (Remote) Job Details: Must have skills: cache ... Develop and execute unit, systems integration, and user-acceptance test plans. Prepare and test ...
Quick apply
W2 Only :: Cache Developer in Lenexa, KS (100% Remote) :: Must Have 8+ Years Exp. E
Lenexa, KS · On-site
Job Title - Cache Developer Location - Lenexa, KS (Remote) Job Details: Must have skills: cache ... Develop and execute unit, systems integration, and user-acceptance test plans. Prepare and test ...
Graphics Cache Hierarchy Design Verification Engineer
Santa Clara, CA · On-site
$150K - $277K/yr
Graphics Cache Hierarchy Design Verification Engineer Santa Clara, California, United States ... system-on-chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently ...
Graphics Cache Hierarchy Design Verification Engineer
Santa Clara, CA · On-site
$150K - $277K/yr
Graphics Cache Hierarchy Design Verification Engineer Santa Clara, California, United States ... system-on-chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently ...
Graphics Cache Hierarchy Design Verification Engineer
Santa Clara, CA · On-site
$159K - $195K/yr
... system-on-chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently ... The Graphics Cache Hierarchy Verification Engineer will be responsible for the pre-silicon RTL ...
Graphics Cache Hierarchy Design Verification Engineer
Santa Clara, CA · On-site
$159K - $195K/yr
... system-on-chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently ... The Graphics Cache Hierarchy Verification Engineer will be responsible for the pre-silicon RTL ...
System Performance Modeling Engineer
San Diego, CA · On-site
$115K - $173K/yr
... System Cache, Memory Controllers and System MMU used in all Qualcomm SoCs. This role centers on ... Strong knowledge of object‑oriented programming (C++, Python) and programming paradigms.
System Performance Modeling Engineer
San Diego, CA · On-site
$115K - $173K/yr
... System Cache, Memory Controllers and System MMU used in all Qualcomm SoCs. This role centers on ... Strong knowledge of object‑oriented programming (C++, Python) and programming paradigms.
Career Accelerator Program - Digital Design Engineer - MS/PhD
Dallas, TX · On-site
$135K/yr
As a Digital IC Design Engineer, you'll architect new TI products and make our customers' visions a ... shared memory and cache systems including coherent TI DSP and ARM processors. You'll have the ...
Career Accelerator Program - Digital Design Engineer - MS/PhD
Dallas, TX · On-site
$135K/yr
As a Digital IC Design Engineer, you'll architect new TI products and make our customers' visions a ... shared memory and cache systems including coherent TI DSP and ARM processors. You'll have the ...
Graphics Cache Hierarchy Design Verification Engineer
Santa Clara, CA · On-site
$159K - $195K/yr
... system-on-chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently ... The Graphics Cache Hierarchy Verification Engineer will be responsible for the pre-silicon RTL ...
Graphics Cache Hierarchy Design Verification Engineer
Santa Clara, CA · On-site
$159K - $195K/yr
... system-on-chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently ... The Graphics Cache Hierarchy Verification Engineer will be responsible for the pre-silicon RTL ...
CPU Cache Microarchitect/RTL Engineer
Beaverton, OR · On-site
$184K - $324K/yr
We are looking for an experienced engineer who can drive CPU multi-level cache subsystem architecture and RTL development for multi-processor systems. Description As a CPU Cache Microarchitect/RTL ...
CPU Cache Microarchitect/RTL Engineer
Beaverton, OR · On-site
$184K - $324K/yr
We are looking for an experienced engineer who can drive CPU multi-level cache subsystem architecture and RTL development for multi-processor systems. Description As a CPU Cache Microarchitect/RTL ...
Ambient Compute System Architecture and Power Engineer
San Diego, CA · On-site
$148K - $222K/yr
Perform detailed data-path and memory-access analysis (cache, SRAM, DDR) to identify bottlenecks ... OR PhD in Engineering, Information Systems, Computer Science, or related field and 2+ years of ...
Ambient Compute System Architecture and Power Engineer
San Diego, CA · On-site
$148K - $222K/yr
Perform detailed data-path and memory-access analysis (cache, SRAM, DDR) to identify bottlenecks ... OR PhD in Engineering, Information Systems, Computer Science, or related field and 2+ years of ...
Cache System Engineer information
See salary details
$53.5K - $63.8K
2% of jobs
$63.8K - $74.1K
4% of jobs
$74.1K - $84.5K
7% of jobs
$84.5K - $94.8K
9% of jobs
$97.6K is the 25th percentile. Wages below this are outliers.
$94.8K - $105.1K
10% of jobs
$105.1K - $115.4K
7% of jobs
$115.4K - $125.7K
10% of jobs
The median wage is $127.4K / yr.
$125.7K - $136K
6% of jobs
$136K - $146.4K
3% of jobs
$156.4K is the 75th percentile. Wages above this are outliers.
$146.4K - $156.7K
17% of jobs
$156.7K - $167K
24% of jobs
$53.5K
$127.2K
$167K
How much do cache system engineer jobs pay per year?
What are popular job titles related to Cache System Engineer jobs?
For Cache System Engineer jobs, the most frequently searched job titles are:
Senior Cache Coherency Architect
Santa Clara, CA • On-site
Full-time
Re-posted 25 days ago
Nvidia rating
9.6
Based on 18 frontline employees who took The Breakroom Quiz
Job description
We are seeking an experienced Senior Cache Coherency Architect to join our ambitious team at NVIDIA. This opportunity allows you to be part of a world-class organization that develops scalable, low-latency, high-bandwidth coherent interconnect systems. These systems power groundbreaking NVIDIA products such as Grace-CPU-Superchip, Grace-Hopper-Superchip, and Vera-Rubin.
In this role, you will contribute to the architecture of cache-coherent interconnect and cache subsystems, including architecture definition, modeling, and implementation. You will collaborate with CPU, GPU, memory subsystem, and SoC architects to define coherency solutions that integrate effectively into SoC designs. The role requires close partnership with multiple IP creation and verification teams throughout the project lifecycle. This position provides the chance to create a meaningful impact across product lines ranging from consumer graphics to automotive and AI platforms.
What you'll be doing:
Define consistent interconnect architecture, cache-coherency protocols, and high-performance on-chip interconnect interfaces.
Contribute to interconnect IP block specifications, build, verification, and integration into the NoC fabric to ensure cache-coherency compliance.
Collaborate with architects to guarantee the interconnect architecture aligns with project power, performance, and area (PPA) requirements.
Develop and maintain functional and performance models for the NoC fabric and IP units to assist with analysis and validation.
Collaborate with cross-functional design and verification teams (simulation, emulation, and formal) to ensure implementations align with architectural specifications.
Support silicon bring-up and post-silicon debug as needed.
What we need to see:
Master's degree in electrical engineering, Computer Engineering, Computer Science, or equivalent experience.
5+ years of experience in processor design or other high-performance semiconductor designs.
Deep understanding of cache coherency, with hands-on experience in industry-standard protocols (e.g., AXI, ACE, CHI).
Experience authoring specifications and designing cache-coherent interconnects.
Strong understanding of system and memory subsystem architecture, with a focus on cache-coherent interconnect.
Experience developing coherent IP models (e.g., VIPs, BFMs) for simulation and emulation.
Proficiency in C, C++, Python, and Verilog.
Join us and help build the future of computing at NVIDIA!
You will also be eligible for equity and benefits.
This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.
NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.About Nvidia
Sourced by ZipRecruiter
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology--and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Santa Clara, CA, US