Cache design, critical path simulations and design custom blocks to meet stringent Power ... Note: A Bachelor's degree in Electrical /Computer Engineering, or a STEM-related field with 4+ ...
Cache design, critical path simulations and design custom blocks to meet stringent Power ... Note: A Bachelor's degree in Electrical /Computer Engineering, or a STEM-related field with 4+ ...
Memory Circuit Design Engineer
Austin, TX Β· On-site
... Engineer to drive the design and development of advanced memory circuits for future CPU and SoC ... Cache design, critical path simulations and design custom blocks. * Memory path-finding activities ...
Memory Circuit Design Engineer
Austin, TX Β· On-site
... Engineer to drive the design and development of advanced memory circuits for future CPU and SoC ... Cache design, critical path simulations and design custom blocks. * Memory path-finding activities ...
SRAM Circuit Design Engineer
Austin, TX Β· On-site
You and your team will apply engineering fundamentals and start from scratch if needed, bringing ... Knowledge of Cache design/architecture, memory hierarchy is a huge plus. Working knowledge of RTL ...
SRAM Circuit Design Engineer
Austin, TX Β· On-site
You and your team will apply engineering fundamentals and start from scratch if needed, bringing ... Knowledge of Cache design/architecture, memory hierarchy is a huge plus. Working knowledge of RTL ...
Interconnect Design Engineer
Santa Clara, CA Β· On-site
Architect, design and implement an enhanced TileLink interconnect, cache controllers, protocol ... Strong software engineering skills/background, including: * Object-oriented, aspect-oriented, and ...
Interconnect Design Engineer
Santa Clara, CA Β· On-site
Architect, design and implement an enhanced TileLink interconnect, cache controllers, protocol ... Strong software engineering skills/background, including: * Object-oriented, aspect-oriented, and ...
Interconnect Design Engineer
Austin, TX Β· On-site
Architect, design and implement an enhanced TileLink interconnect, cache controllers, protocol ... Strong software engineering skills/background, including: * Object-oriented, aspect-oriented, and ...
Interconnect Design Engineer
Austin, TX Β· On-site
Architect, design and implement an enhanced TileLink interconnect, cache controllers, protocol ... Strong software engineering skills/background, including: * Object-oriented, aspect-oriented, and ...
Interconnect Design Engineer
Boston, MA Β· On-site
Architect, design and implement an enhanced TileLink interconnect, cache controllers, protocol ... Strong software engineering skills/background, including: * Object-oriented, aspect-oriented, and ...
Interconnect Design Engineer
Boston, MA Β· On-site
Architect, design and implement an enhanced TileLink interconnect, cache controllers, protocol ... Strong software engineering skills/background, including: * Object-oriented, aspect-oriented, and ...
Senior Software Developer - RPMS/FileMan/M/Cache
WV Β· On-site +1
$129K - $146K/yr
Software Engineering Job Qualifications: Skills ... Cache Design, FileMan (Inactive), M-Code Certifications: None Experience: 8 + years of related ...
Senior Software Developer - RPMS/FileMan/M/Cache
WV Β· On-site +1
$129K - $146K/yr
Software Engineering Job Qualifications: Skills ... Cache Design, FileMan (Inactive), M-Code Certifications: None Experience: 8 + years of related ...
MICROARCHITECT AND RTL DESIGN ENGINEER SANTA CLARA, CA About the role: We are seeking a seasoned ... Experience designing IP blocks for caches, cache coherency, memory subsystems, interconnects and ...
MICROARCHITECT AND RTL DESIGN ENGINEER SANTA CLARA, CA About the role: We are seeking a seasoned ... Experience designing IP blocks for caches, cache coherency, memory subsystems, interconnects and ...
As a member of our CPU Cache Coherent Interconnects Design Team, you will be responsible for the ... Master's Degree in Electrical Engineering, Computer Engineering or Computer Science or equivalent ...
As a member of our CPU Cache Coherent Interconnects Design Team, you will be responsible for the ... Master's Degree in Electrical Engineering, Computer Engineering or Computer Science or equivalent ...
As a member of our CPU Cache Coherent Interconnects Design Team, you will be responsible for the ... Master's Degree in Electrical Engineering, Computer Engineering or Computer Science or equivalent ...
As a member of our CPU Cache Coherent Interconnects Design Team, you will be responsible for the ... Master's Degree in Electrical Engineering, Computer Engineering or Computer Science or equivalent ...
As a member of our CPU Cache Coherent Interconnects Design Team, you will be responsible for the ... Master's Degree in Electrical Engineering, Computer Engineering or Computer Science or equivalent ...
As a member of our CPU Cache Coherent Interconnects Design Team, you will be responsible for the ... Master's Degree in Electrical Engineering, Computer Engineering or Computer Science or equivalent ...
Interconnect Design Engineer
Santa Clara, CA Β· On-site
Architect, design and implement an enhanced TileLink interconnect, cache controllers, protocol ... Strong software engineering skills/background, including: * Object-oriented, aspect-oriented, and ...
Interconnect Design Engineer
Santa Clara, CA Β· On-site
Architect, design and implement an enhanced TileLink interconnect, cache controllers, protocol ... Strong software engineering skills/background, including: * Object-oriented, aspect-oriented, and ...
Architect the memory hierarchy : including multiβlevel cache controllers, scratchpad memory ... Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, or a closely related ...
Architect the memory hierarchy : including multiβlevel cache controllers, scratchpad memory ... Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, or a closely related ...
We are looking for an experienced engineer who can drive CPU multi-level cache subsystem ... design to target power, performance, area and timing goals β’ Verification - support the ...
We are looking for an experienced engineer who can drive CPU multi-level cache subsystem ... design to target power, performance, area and timing goals β’ Verification - support the ...
Founding Design Engineer
San Francisco, CA Β· On-site
Design Engineering Video is the most powerful way humans tell stories. It always has been. But ... OPFS, Cache Storage, cache headers, and related browser primitives. * Work across core product ...
Founding Design Engineer
San Francisco, CA Β· On-site
Design Engineering Video is the most powerful way humans tell stories. It always has been. But ... OPFS, Cache Storage, cache headers, and related browser primitives. * Work across core product ...
Founding Design Engineer
San Francisco, CA Β· On-site
Design Engineering Video is the most powerful way humans tell stories. It always has been. But ... OPFS, Cache Storage, cache headers, and related browser primitives. * Work across core product ...
Founding Design Engineer
San Francisco, CA Β· On-site
Design Engineering Video is the most powerful way humans tell stories. It always has been. But ... OPFS, Cache Storage, cache headers, and related browser primitives. * Work across core product ...
Principal Software Engineer
Columbus, OH Β· On-site
$130K - $174K/yr
Experience with database technologies (SQL and NoSQL) along with cache design. * Practical ... Knowledge of modern engineering practices and best practices for software development, including ...
Principal Software Engineer
Columbus, OH Β· On-site
$130K - $174K/yr
Experience with database technologies (SQL and NoSQL) along with cache design. * Practical ... Knowledge of modern engineering practices and best practices for software development, including ...
We are looking for an experienced engineer who can drive CPU multi-level cache subsystem ... design to target power, performance, area and timing goals β’ Verification - support the ...
We are looking for an experienced engineer who can drive CPU multi-level cache subsystem ... design to target power, performance, area and timing goals β’ Verification - support the ...
Design Engineering Video is the most powerful way humans tell stories. It always has been. But ... OPFS, Cache Storage, cache headers, and related browser primitives. * Work across core product ...
Design Engineering Video is the most powerful way humans tell stories. It always has been. But ... OPFS, Cache Storage, cache headers, and related browser primitives. * Work across core product ...
We are looking for an experienced engineer who can drive CPU multi-level cache subsystem ... design to target power, performance, area and timing goals β’ Verification - support the ...
We are looking for an experienced engineer who can drive CPU multi-level cache subsystem ... design to target power, performance, area and timing goals β’ Verification - support the ...
Cache Design Engineer information
See salary details
$40.5K - $51.2K
2% of jobs
$51.2K - $62K
11% of jobs
$67.7K is the 25th percentile. Wages below this are outliers.
$62K - $72.7K
23% of jobs
The median wage is $79.6K / yr.
$72.7K - $83.4K
22% of jobs
$83.4K - $94.1K
17% of jobs
$94.4K is the 75th percentile. Wages above this are outliers.
$94.1K - $104.9K
9% of jobs
$104.9K - $115.6K
6% of jobs
$115.6K - $126.3K
3% of jobs
$126.3K - $137K
3% of jobs
$137K - $147.8K
2% of jobs
$147.8K - $158.5K
1% of jobs
$40.5K
$88.2K
$158.5K
How much do cache design engineer jobs pay per year?
What are popular job titles related to Cache Design Engineer jobs?
For Cache Design Engineer jobs, the most frequently searched job titles are:

CPU Circuit Memory Design Engineer
On-site
Other
Medical, Retirement, PTO
Posted 10 days ago
Job description
Job Description:
About the Role
β’β’β’β’β’ 's CPU Circuit Technology team is seeking a highly motivated CPU Memory Design Engineer to help develop the next generation of high-performance, power-efficient processors. In this role, you will contribute to the design, development, and optimization of custom and compiler-based embedded memory solutions, including SRAMs, caches, register files, ROMs, and advanced memory circuits used in β’β’β’β’β’ CPUs and SoCs.
You will collaborate closely with architects, circuit designers, physical design engineers, process technologists, and validation teams to drive innovative memory solutions that enable industry-leading performance, power efficiency, and silicon density on advanced process technologies.
This role offers the opportunity to influence future CPU architecture through memory innovation while working on technologies that power millions of devices worldwide.
What Youβll Do
This will be a fast-paced dynamic environment where you will work in the high performance, low power CPU design team on a wide spectrum of circuit activities including, but may not be limited to:
- Technical readiness, memory circuit design, characterization and simulations.
- Cache design, critical path simulations and design custom blocks to meet stringent Power/Performance/Area constraints.
- Memory path-finding activities and power, performance and area (PPA) optimization.
- Memory bit-cell and complex periphery IC design and automation.
- Memory array/IP design, memory circuit innovation.
- Methodology definition tasks as well as executing project schedules.
Behavioral traits that we are looking for:
- Strong Ownership: Takes accountability for complex technical challenges and drives solutions through completion.
- Technical Curiosity: Continuously seeks to learn, innovate, and improve designs through data-driven decision making.
- Collaboration: Builds effective partnerships across architecture, design, layout, and validation teams.
- Problem Solving: Applies analytical thinking to identify root causes and develop scalable solutions.
- Execution Excellence: Delivers high-quality work while balancing technical depth, schedule commitments, and business priorities.
- Communication Skills: Effectively communicates technical concepts, risks, and recommendations to diverse stakeholders.
- Adaptability: Thrives in a fast-paced environment with evolving priorities and technology challenges
β’β’β’β’β’ invests in our people and offers a complete and competitive package of benefits employees and their families through every stage of life.
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Educational requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
Note:
A Bachelor's degree in Electrical /Computer Engineering, or a STEM-related field with 4+ years of experience. Or a Master's degree in the same filed with 2+ years of experience; or a PhD with 1 year of educational or work experience in the same filed.
Your experience described above must be in the following:
- CMOS circuit design, digital logic optimizations, and circuit trade-offs for power, performance, and area.
- Experience in Very Large Scale Integration (VLSI) circuits and design methodologies
Preferred Qualifications and Experience:
- Experience in low-power implementation techniques and memory design.
- Familiarity with circuit and layout trade-offs for optimized design.
- Knowledge of EBB design tools, flows and methodologies, and signal integrity analysis.
At β’β’β’β’β’ , you'll help shape the future of computing by developing memory technologies that power next-generation CPUs and AI-driven platforms. You'll work alongside world-class engineers, influence cutting-edge silicon innovation, and have opportunities to grow your career while solving some of the industry's most challenging technical problems. If you're passionate about advanced circuit design and creating technologies that impact billions of people worldwide, β’β’β’β’β’ is the place for you.
Job Type:
Experienced Hire
Shift:
Shift 1 (United States of America)
Primary Location:
US, Texas, Austin
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at β’β’β’β’β’.
Annual Salary Range for jobs which could be performed in the US: $141,910.00-200,340.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned β’β’β’β’β’ site and off-site. Job posting details (such as work model, location or time type) are subject to change.
ADDITIONAL INFORMATION: β’β’β’β’β’ is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
Why Join β’β’β’β’β’ ?
At β’β’β’β’β’ , you'll help shape the future of computing by developing memory technologies that power next-generation CPUs and AI-driven platforms. You'll work alongside world-class engineers, influence cutting-edge silicon innovation, and have opportunities to grow your career while solving some of the industry's most challenging technical problems. If you're passionate about advanced circuit design and creating technologies that impact billions of people worldwide, β’β’β’β’β’ is the place for you.