Wireless SoC Design Engineer
$120K - $210K/yr
... VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW ... Provide support for pre-silicon verification and software/firmware development. Assist in post ...
Wireless SoC Design Engineer
$120K - $210K/yr
... VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW ... Provide support for pre-silicon verification and software/firmware development. Assist in post ...
Wireless SoC Design Engineer
$171K - $302K/yr
... VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW ... Provide support for pre-silicon verification and software/firmware development. Assist in post ...
Wireless SoC Design Engineer
$171K - $302K/yr
... VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW ... Provide support for pre-silicon verification and software/firmware development. Assist in post ...
Debug SoC Design Engineer
$171K - $302K/yr
... VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW ... Performance/power correlation - assist performance/power teams to diagnose suspected bottlenecks or ...
Debug SoC Design Engineer
$171K - $302K/yr
... VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW ... Performance/power correlation - assist performance/power teams to diagnose suspected bottlenecks or ...
Debug SoC Design Engineer
$171K - $302K/yr
... VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW ... Performance/power correlation - assist performance/power teams to diagnose suspected bottlenecks or ...
Debug SoC Design Engineer
$171K - $302K/yr
... VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW ... Performance/power correlation - assist performance/power teams to diagnose suspected bottlenecks or ...
Debug SoC Design Engineer
$120K - $210K/yr
... VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW ... Performance/power correlation - assist performance/power teams to diagnose suspected bottlenecks or ...
Debug SoC Design Engineer
$120K - $210K/yr
... VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW ... Performance/power correlation - assist performance/power teams to diagnose suspected bottlenecks or ...
Debug SoC Design Engineer
$120K - $210K/yr
... VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW ... Performance/power correlation - assist performance/power teams to diagnose suspected bottlenecks or ...
Debug SoC Design Engineer
$120K - $210K/yr
... VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW ... Performance/power correlation - assist performance/power teams to diagnose suspected bottlenecks or ...
Debug SoC Design Engineer
$171K - $302K/yr
... VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW ... Performance/power correlation - assist performance/power teams to diagnose suspected bottlenecks or ...
Debug SoC Design Engineer
$171K - $302K/yr
... VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW ... Performance/power correlation - assist performance/power teams to diagnose suspected bottlenecks or ...
Debug SoC Design Engineer
$120K - $210K/yr
... VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW ... Performance/power correlation - assist performance/power teams to diagnose suspected bottlenecks or ...
Debug SoC Design Engineer
$120K - $210K/yr
... VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW ... Performance/power correlation - assist performance/power teams to diagnose suspected bottlenecks or ...
Debug SoC Design Engineer
$171K - $302K/yr
... VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW ... Performance/power correlation - assist performance/power teams to diagnose suspected bottlenecks or ...
Debug SoC Design Engineer
$171K - $302K/yr
... VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW ... Performance/power correlation - assist performance/power teams to diagnose suspected bottlenecks or ...
Debug SoC Design Engineer
$120K - $210K/yr
... VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW ... Performance/power correlation - assist performance/power teams to diagnose suspected bottlenecks or ...
Debug SoC Design Engineer
$120K - $210K/yr
... VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW ... Performance/power correlation - assist performance/power teams to diagnose suspected bottlenecks or ...
Debug SoC Design Engineer
$120K - $210K/yr
... VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW ... Performance/power correlation - assist performance/power teams to diagnose suspected bottlenecks or ...
Debug SoC Design Engineer
$120K - $210K/yr
... VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW ... Performance/power correlation - assist performance/power teams to diagnose suspected bottlenecks or ...
Debug SoC Design Engineer
$120K - $210K/yr
... VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW ... Performance/power correlation - assist performance/power teams to diagnose suspected bottlenecks or ...
Debug SoC Design Engineer
$120K - $210K/yr
... VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW ... Performance/power correlation - assist performance/power teams to diagnose suspected bottlenecks or ...
CAD Engineer - Signoff Infrastructure
$126K - $190K/yr
You'll also participate in the development of our Signoff AI assistant and integrate modern AI/RAG ... design, VLSI, or CAD tools Interest in AI/ML technologies Personal projects or internships ...
CAD Engineer - Signoff Infrastructure
$126K - $190K/yr
You'll also participate in the development of our Signoff AI assistant and integrate modern AI/RAG ... design, VLSI, or CAD tools Interest in AI/ML technologies Personal projects or internships ...
CAD Engineer - Signoff Infrastructure
$126K - $190K/yr
You'll also participate in the development of our Signoff AI assistant and integrate modern AI/RAG ... design, VLSI, or CAD tools Interest in AI/ML technologies Personal projects or internships ...
CAD Engineer - Signoff Infrastructure
$126K - $190K/yr
You'll also participate in the development of our Signoff AI assistant and integrate modern AI/RAG ... design, VLSI, or CAD tools Interest in AI/ML technologies Personal projects or internships ...
... VLSI physical design implementation on 5nm, 4nm and 3nm technology. * A successful track record of delivering designs to production is a requirement. * Able to assist in design flow development and ...
... VLSI physical design implementation on 5nm, 4nm and 3nm technology. * A successful track record of delivering designs to production is a requirement. * Able to assist in design flow development and ...
... VLSI physical design implementation on 5nm, 4nm and 3nm technology. * A successful track record of delivering designs to production is a requirement. * Able to assist in design flow development and ...
... VLSI physical design implementation on 5nm, 4nm and 3nm technology. * A successful track record of delivering designs to production is a requirement. * Able to assist in design flow development and ...
Analog/Mixed-Signal Design Engineer, Principal
Hillsboro, OR · On-site
$220K/yr
... digital/VLSI, AI/ML, Photonics, and packaging. Expected Base Pay Range (USD) 176,500 - 261,180 ... These tools must not be used to record, assist with, or enhance responses in any way. Our ...
Analog/Mixed-Signal Design Engineer, Principal
Hillsboro, OR · On-site
$220K/yr
... digital/VLSI, AI/ML, Photonics, and packaging. Expected Base Pay Range (USD) 176,500 - 261,180 ... These tools must not be used to record, assist with, or enhance responses in any way. Our ...
... digital/VLSI, AI/ML, Photonics, and packaging. Expected Base Pay Range (USD) 176,500 - 261,180 ... These tools must not be used to record, assist with, or enhance responses in any way. Our ...
... digital/VLSI, AI/ML, Photonics, and packaging. Expected Base Pay Range (USD) 176,500 - 261,180 ... These tools must not be used to record, assist with, or enhance responses in any way. Our ...
... digital/VLSI, AI/ML, Photonics, and packaging. Expected Base Pay Range (USD) 174,530 - 261,400 ... These tools must not be used to record, assist with, or enhance responses in any way. Our ...
... digital/VLSI, AI/ML, Photonics, and packaging. Expected Base Pay Range (USD) 174,530 - 261,400 ... These tools must not be used to record, assist with, or enhance responses in any way. Our ...
Analog/Mixed-Signal Design Engineer, Principal
Santa Clara, CA · On-site
$237K/yr
... digital/VLSI, AI/ML, Photonics, and packaging. Expected Base Pay Range (USD) 174,530 - 261,400 ... These tools must not be used to record, assist with, or enhance responses in any way. Our ...
Analog/Mixed-Signal Design Engineer, Principal
Santa Clara, CA · On-site
$237K/yr
... digital/VLSI, AI/ML, Photonics, and packaging. Expected Base Pay Range (USD) 174,530 - 261,400 ... These tools must not be used to record, assist with, or enhance responses in any way. Our ...
Assistant Vlsi Design information
What is the difference between Assistant Vlsi Design vs Vlsi Design Engineer?
| Aspect | Assistant Vlsi Design | Vlsi Design Engineer |
|---|---|---|
| Required Credentials | Bachelor's degree in Electrical Engineering or related field | Bachelor's or Master's degree in Electrical Engineering or Computer Engineering |
| Work Environment | Design teams, semiconductor companies, R&D labs | Design teams, semiconductor companies, R&D labs |
| Responsibilities | Assisting in VLSI design tasks, simulations, and verification | Leading VLSI design projects, architecture, and implementation |
| Industry Usage | Commonly used in semiconductor and electronics companies | Used in similar settings, often with more advanced responsibilities |
The main difference between Assistant Vlsi Design and Vlsi Design Engineer lies in their responsibilities and experience level. An Assistant Vlsi Design typically supports design tasks and works under supervision, while a Vlsi Design Engineer takes on more complex projects and leads design efforts. Both roles require similar educational backgrounds and are found in the same industry environments.
More about Assistant Vlsi Design jobs
What cities are hiring for Assistant Vlsi Design jobs? Cities with the most Assistant Vlsi Design job openings:
What are the most commonly searched types of Vlsi Design jobs? The most popular types of Vlsi Design jobs are:
What states have the most Assistant Vlsi Design jobs? States with the most job openings for Assistant Vlsi Design jobs include:
What job categories do people searching Assistant Vlsi Design jobs look for? The top searched job categories for Assistant Vlsi Design jobs are:
$120K - $210K/yr
Full-time
Medical, Dental, Retirement
Posted 25 days ago
Apple rating
8.1
Based on 666 frontline employees who took The Breakroom Quiz
5th of 30 rated technology retailers
Job description
Come join Apple’s growing wireless silicon development team. Our wireless SOC organization is responsible for all aspects of wireless silicon development. With a particular emphasis on highly energy-efficient design and new technologies that transform the user experience at the product level, all of which is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture, and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. If you enjoy a fast-paced and challenging environment and collaborating with people across different functional areas as well as thriving during crisis times, we encourage you to apply.
Description
Develop microarchitecture and RTL for a System-on-Chip (SoC) IP design, aligning with specified functional requirements. Engage in hardware/software partitioning discussions with software and firmware teams. Collaborate cross-functionally to ensure successful SoC integration, supporting design verification and validation across all phases-from concept to silicon bring-up. Work closely with physical design, DFT, and CAD teams to optimize performance, power, and area (PPA) targets while ensuring design quality and maintainability.","responsibilities":"Define microarchitecture working alongside architecture, software and firmware teams.
Implement RTL that adheres to PPA requirements and Lint, CDC and RDC checks.
Collaborate with Verification, DFT, Power, Physical design teams to delivery fully functional IP for SoC integration.
Provide support for pre-silicon verification and software/firmware development.
Assist in post-silicon validation, system integration and debugging effort.
Preferred Qualifications
Skilled in defining ASIC microarchitecture to meet functional requirements while managing performance, power, and area trade-offs.
Knowledgeable in Lint, CDC, RDC, Synthesis and STA.
Expertise in design domains such as memory subsystems, bus interfaces, CPU integration, DMA engines, Compression, Security IP design, and high-speed/low-speed peripherals like PCIE, QSPI, UART, and SPMI.
Thorough understanding of cross clock-domain design principles and associated CDC requirements.
Familiarity with ASIC low power design techniques, including multiple supply domains configuration, dynamic power/clock scaling, and power analysis.
Familiarity with ASIC test methodologies, encompassing DFT, scan insertion, memory BIST, and other related techniques.
Strong communication skills, both written and oral.
Minimum Qualifications
Bachelors Degree in EE,CE, or related field.
Knowledgeable about the ASIC design flow, including System Verilog RTL implementation.
Pay & Benefits
At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $120,300 and $210,100, and your base pay will depend on your skills, qualifications, experience, and location.
Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Description
Develop microarchitecture and RTL for a System-on-Chip (SoC) IP design, aligning with specified functional requirements. Engage in hardware/software partitioning discussions with software and firmware teams. Collaborate cross-functionally to ensure successful SoC integration, supporting design verification and validation across all phases-from concept to silicon bring-up. Work closely with physical design, DFT, and CAD teams to optimize performance, power, and area (PPA) targets while ensuring design quality and maintainability.","responsibilities":"Define microarchitecture working alongside architecture, software and firmware teams.
Implement RTL that adheres to PPA requirements and Lint, CDC and RDC checks.
Collaborate with Verification, DFT, Power, Physical design teams to delivery fully functional IP for SoC integration.
Provide support for pre-silicon verification and software/firmware development.
Assist in post-silicon validation, system integration and debugging effort.
Preferred Qualifications
Skilled in defining ASIC microarchitecture to meet functional requirements while managing performance, power, and area trade-offs.
Knowledgeable in Lint, CDC, RDC, Synthesis and STA.
Expertise in design domains such as memory subsystems, bus interfaces, CPU integration, DMA engines, Compression, Security IP design, and high-speed/low-speed peripherals like PCIE, QSPI, UART, and SPMI.
Thorough understanding of cross clock-domain design principles and associated CDC requirements.
Familiarity with ASIC low power design techniques, including multiple supply domains configuration, dynamic power/clock scaling, and power analysis.
Familiarity with ASIC test methodologies, encompassing DFT, scan insertion, memory BIST, and other related techniques.
Strong communication skills, both written and oral.
Minimum Qualifications
Bachelors Degree in EE,CE, or related field.
Knowledgeable about the ASIC design flow, including System Verilog RTL implementation.
Pay & Benefits
At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $120,300 and $210,100, and your base pay will depend on your skills, qualifications, experience, and location.
Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
About Apple
Sourced by ZipRecruiter
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Cupertino, CA, US
Year founded
1976