... verification engineers; establish clear technical expectations and a culture of ownership and ... ASIC development experience, with demonstrated progression in technical leadership (people ...
... verification engineers; establish clear technical expectations and a culture of ownership and ... ASIC development experience, with demonstrated progression in technical leadership (people ...
ASIC & FPGA Design Engineer Sr - E3
Highlands Ranch, CO · On-site
$110K - $204K/yr
Prior verification experience using UVM methodology. Prior technical leadership experience preferred. Standard Join Our Team as an ASIC/FPGA Verification/Emulation Engineer where you will support ...
ASIC & FPGA Design Engineer Sr - E3
Highlands Ranch, CO · On-site
$110K - $204K/yr
Prior verification experience using UVM methodology. Prior technical leadership experience preferred. Standard Join Our Team as an ASIC/FPGA Verification/Emulation Engineer where you will support ...
Digital ASIC Design Manager
Colorado Springs, CO · On-site
$134K/yr
... verification engineers; establish clear technical expectations and a culture of ownership and ... ASIC development experience, with demonstrated progression in technical leadership (people ...
Digital ASIC Design Manager
Colorado Springs, CO · On-site
$134K/yr
... verification engineers; establish clear technical expectations and a culture of ownership and ... ASIC development experience, with demonstrated progression in technical leadership (people ...
ASIC & FPGA Design Engineer Sr - E3
Littleton, CO · On-site
$110K - $204K/yr
Prior verification experience using UVM methodology. Prior technical leadership experience preferred. Standard Join Our Team as an ASIC/FPGA Verification/Emulation Engineer where you will support ...
ASIC & FPGA Design Engineer Sr - E3
Littleton, CO · On-site
$110K - $204K/yr
Prior verification experience using UVM methodology. Prior technical leadership experience preferred. Standard Join Our Team as an ASIC/FPGA Verification/Emulation Engineer where you will support ...
ASIC Digital / DSP Design Engineer (Junior level)
Colorado Springs, CO · On-site
$134K/yr
Strong EE fundamentals with experience in ASIC Design, DSP, digital architectures, and verification ... Fluency with object-oriented programming * Strong teamwork and written/verbal communication skills
ASIC Digital / DSP Design Engineer (Junior level)
Colorado Springs, CO · On-site
$134K/yr
Strong EE fundamentals with experience in ASIC Design, DSP, digital architectures, and verification ... Fluency with object-oriented programming * Strong teamwork and written/verbal communication skills
ASIC & FPGA Design Engineer Sr - E3
Littleton, CO · On-site
$110K - $204K/yr
Standard Join Our Team as an ASIC/FPGA Verification/Emulation Engineer where you will support over 50 different programs and research and development (R&D) efforts, affecting technology across ...
ASIC & FPGA Design Engineer Sr - E3
Littleton, CO · On-site
$110K - $204K/yr
Standard Join Our Team as an ASIC/FPGA Verification/Emulation Engineer where you will support over 50 different programs and research and development (R&D) efforts, affecting technology across ...
ASIC Digital Design Engineer
Colorado Springs, CO · On-site
$96 - $160/hr
Proficiency in software models and their usagein the design, verification, and programming of an ASIC * Fluency with object-oriented programming * Strong teamwork and written/verbal communication ...
ASIC Digital Design Engineer
Colorado Springs, CO · On-site
$96 - $160/hr
Proficiency in software models and their usagein the design, verification, and programming of an ASIC * Fluency with object-oriented programming * Strong teamwork and written/verbal communication ...
ASIC Digital / DSP Design Engineer (Junior level)
Colorado Springs, CO · On-site
$70 - $95/hr
Strong EE fundamentals with experience in ASIC Design, DSP, digital architectures, and verification ... Fluency with object-oriented programming * Strong teamwork and written/verbal communication skills
ASIC Digital / DSP Design Engineer (Junior level)
Colorado Springs, CO · On-site
$70 - $95/hr
Strong EE fundamentals with experience in ASIC Design, DSP, digital architectures, and verification ... Fluency with object-oriented programming * Strong teamwork and written/verbal communication skills
ASIC/FPGA Design Engineer IV
Littleton, CO · On-site
$123K - $169K/yr
Join Our Team as an ASIC & FPGA Design Engineer where you will support over 50 different programs ... Interface with an independent verification team who will be working in parallel, verifying the ...
ASIC/FPGA Design Engineer IV
Littleton, CO · On-site
$123K - $169K/yr
Join Our Team as an ASIC & FPGA Design Engineer where you will support over 50 different programs ... Interface with an independent verification team who will be working in parallel, verifying the ...
Analog ASIC Design Engineer
Boulder, CO · On-site
$148.90 - $276.50/hr
Proficiency with modern ASIC design and verification tools. * Strong foundation in analog and RF ... MSEE or PhD in Electrical Engineering * 10+ years of experience in analog and/or mixed‑signal IC ...
Analog ASIC Design Engineer
Boulder, CO · On-site
$148.90 - $276.50/hr
Proficiency with modern ASIC design and verification tools. * Strong foundation in analog and RF ... MSEE or PhD in Electrical Engineering * 10+ years of experience in analog and/or mixed‑signal IC ...
Analog ASIC Design Engineer
Boulder, CO · On-site
$209K/yr
Proficiency with modern ASIC design and verification tools. * Strong foundation in analog and RF ... MSEE or PhD in Electrical Engineering * 10+ years of experience in analog and/or mixed-signal IC ...
Analog ASIC Design Engineer
Boulder, CO · On-site
$209K/yr
Proficiency with modern ASIC design and verification tools. * Strong foundation in analog and RF ... MSEE or PhD in Electrical Engineering * 10+ years of experience in analog and/or mixed-signal IC ...
ASIC Physical Design Engineer Tektronix Boulder, CO, United States + 1 more
Boulder, CO · On-site
$149 - $277/hr
Preferred Qualifications · 10+ years of hands-on experience ASIC physical design from RTL to verified GDS. · MS or PhD in Electrical Engineering or equivalent experience. · Principal-level ...
ASIC Physical Design Engineer Tektronix Boulder, CO, United States + 1 more
Boulder, CO · On-site
$149 - $277/hr
Preferred Qualifications · 10+ years of hands-on experience ASIC physical design from RTL to verified GDS. · MS or PhD in Electrical Engineering or equivalent experience. · Principal-level ...
Analog ASIC Design Engineer
Boulder, CO · On-site
$148.90 - $276.50/hr
Our inclusive engineering culture is hardworking, inquisitive, and always eager to learn and grow ... Proficiency with modern ASIC design and verification tools.Strong foundation in analog and RF ...
Analog ASIC Design Engineer
Boulder, CO · On-site
$148.90 - $276.50/hr
Our inclusive engineering culture is hardworking, inquisitive, and always eager to learn and grow ... Proficiency with modern ASIC design and verification tools.Strong foundation in analog and RF ...
Senior Custom ASIC Engineering Lead
$143K - $230K/yr
Are you a versatile, senior engineer capable of leading external and internal cross-functional ... verification, DRC, logic synthesis * Knowledge of DFT methods including scan, memory BIST and ...
Senior Custom ASIC Engineering Lead
$143K - $230K/yr
Are you a versatile, senior engineer capable of leading external and internal cross-functional ... verification, DRC, logic synthesis * Knowledge of DFT methods including scan, memory BIST and ...
Senior Custom ASIC Engineering Lead
Fort Collins, CO · On-site
$143K - $230K/yr
Are you a versatile, senior engineer capable of leading external and internal cross-functional ... verification, DRC, logic synthesis * Knowledge of DFT methods including scan, memory BIST and ...
Senior Custom ASIC Engineering Lead
Fort Collins, CO · On-site
$143K - $230K/yr
Are you a versatile, senior engineer capable of leading external and internal cross-functional ... verification, DRC, logic synthesis * Knowledge of DFT methods including scan, memory BIST and ...
ASIC & FPGA Design Engineer Stf - E4
Littleton, CO · On-site
$135K - $251K/yr
Develops, designs, verifies, and documents Application-Specific Integrated Circuits (ASIC) and Field Programmable Gate Arrays (FPGA) development. Determines architecture design, logic design, and ...
ASIC & FPGA Design Engineer Stf - E4
Littleton, CO · On-site
$135K - $251K/yr
Develops, designs, verifies, and documents Application-Specific Integrated Circuits (ASIC) and Field Programmable Gate Arrays (FPGA) development. Determines architecture design, logic design, and ...
ASIC & FPGA Design Engineer Stf - E4
Louisville, CO · On-site
$135K - $251K/yr
Develops, designs, verifies, and documents Application-Specific Integrated Circuits (ASIC) and Field Programmable Gate Arrays (FPGA) development. Determines architecture design, logic design, and ...
ASIC & FPGA Design Engineer Stf - E4
Louisville, CO · On-site
$135K - $251K/yr
Develops, designs, verifies, and documents Application-Specific Integrated Circuits (ASIC) and Field Programmable Gate Arrays (FPGA) development. Determines architecture design, logic design, and ...
ASIC & FPGA Design Engineer Stf - E4
Littleton, CO · On-site
$135K - $251K/yr
Develops, designs, verifies, and documents Application-Specific Integrated Circuits (ASIC) and Field Programmable Gate Arrays (FPGA) development. Determines architecture design, logic design, and ...
ASIC & FPGA Design Engineer Stf - E4
Littleton, CO · On-site
$135K - $251K/yr
Develops, designs, verifies, and documents Application-Specific Integrated Circuits (ASIC) and Field Programmable Gate Arrays (FPGA) development. Determines architecture design, logic design, and ...
ASIC & FPGA Design Engineer Stf - E4
Boulder, CO · On-site
$135K - $251K/yr
Develops, designs, verifies, and documents Application-Specific Integrated Circuits (ASIC) and Field Programmable Gate Arrays (FPGA) development. Determines architecture design, logic design, and ...
ASIC & FPGA Design Engineer Stf - E4
Boulder, CO · On-site
$135K - $251K/yr
Develops, designs, verifies, and documents Application-Specific Integrated Circuits (ASIC) and Field Programmable Gate Arrays (FPGA) development. Determines architecture design, logic design, and ...
ASIC Digital Physical Design Manager
Colorado Springs, CO · On-site
$134K - $138K/yr
Our team of senior engineers has delivered generations of innovation across ASIC and product ... Lead physical verification and signoff (DRC/LVS, STA, power/IR/EM, reliability as applicable) and ...
ASIC Digital Physical Design Manager
Colorado Springs, CO · On-site
$134K - $138K/yr
Our team of senior engineers has delivered generations of innovation across ASIC and product ... Lead physical verification and signoff (DRC/LVS, STA, power/IR/EM, reliability as applicable) and ...
Asic Verification Engineer information
See Colorado salary details
$92.5K - $103.9K
9% of jobs
$103.9K - $115.3K
2% of jobs
$115.3K - $126.7K
2% of jobs
$126.7K - $138K
4% of jobs
$142.1K is the 25th percentile. Wages below this are outliers.
$138K - $149.4K
22% of jobs
$149.4K - $160.8K
4% of jobs
The median wage is $172.2K / yr.
$160.8K - $172.2K
6% of jobs
$182.1K is the 75th percentile. Wages above this are outliers.
$172.2K - $183.5K
29% of jobs
$183.5K - $194.9K
9% of jobs
$194.9K - $206.3K
6% of jobs
$206.3K - $217.7K
6% of jobs
$92.5K
$164.1K
$217.7K
How much do asic verification engineer jobs pay per year?
What is an ASIC Verification Engineer?
What is an ASIC Verification Engineer?
An ASIC verification engineer works with system designers and architects to test performance and validate hardware components and systems. You plan and develop a verification environment while coordinating with developers and architects throughout the design process. Your duties involve working closely with these other teams during the design process. Your responsibilities may include using computer hardware languages such as Verilog. In this career, you work on hardware design and use algorithms, data structure analysis, and other advanced design techniques.
What are the key skills and qualifications needed to thrive as an ASIC Verification Engineer, and why are they important?
What are some common challenges faced by ASIC Verification Engineers during the verification process?
What is the difference between Asic Verification Engineer vs Digital Design Engineer?
| Aspect | Asic Verification Engineer | Digital Design Engineer |
|---|---|---|
| Primary Focus | Verifying ASIC designs for correctness and functionality | Designing digital circuits and architectures |
| Skills & Certifications | Hardware description languages (HDL), verification tools, scripting | HDL, digital logic, circuit design |
| Work Environment | Verification labs, simulation environments | Design teams, CAD tools, prototyping labs |
| Industry Usage | Semiconductor, electronics manufacturing | Semiconductor, consumer electronics, computing |
While both roles require expertise in HDL and semiconductor industry experience, Asic Verification Engineers focus on testing and validating ASIC designs, ensuring they meet specifications. Digital Design Engineers primarily create and develop digital circuits. Both roles are essential in the chip development process but differ in their core responsibilities and daily tasks.
What are popular job titles related to Asic Verification Engineer jobs in Colorado?
For Asic Verification Engineer jobs in Colorado, the most frequently searched job titles are:
What job categories do people searching Asic Verification Engineer jobs in Colorado look for?
The top searched job categories for Asic Verification Engineer jobs in Colorado are:
What are popular job titles related to Asic Verification Engineer jobs in CO?
For Asic Verification Engineer jobs in CO, the most frequently searched job titles are:

$134K/yr
Full-time
Medical, Dental, Vision, Life, Retirement, PTO
Re-posted 8 days ago
Keysight Technologies rating
8.1
Based on 20 frontline employees who took The Breakroom Quiz
52nd of 161 rated electronics manufacturers
Job description
Keysight is at the forefront of technology innovation, delivering breakthroughs and trusted insights in electronic design, simulation, prototyping, test, manufacturing, and optimization. Our ~15,000 employees create world-class solutions in communications, 5G, automotive, energy, quantum, aerospace, defense, and semiconductor markets for customers in over 100 countries. Learn more about what we do.
Our award-winning culture embraces a bold vision of where technology can take us and a passion for tackling challenging problems with industry-first solutions. We believe that when people feel a sense of belonging, they can be more creative, innovative, and thrive at all points in their careers.
A sustained driver of Keysight’s success is the creation and deployment of breakthrough digital and mixed-signal ASICs that unlock step-function performance and customer value in new products. We are seeking a Digital Design ASIC R&D Manager to lead and grow this capability within our ASIC team.
The role is based in Colorado Springs at the foot of Pikes Peak, with a purpose-built development campus that brings engineering, advanced technology development, assembly, and machining together in one location. Outside the lab, the campus supports an active lifestyle with on-site fitness and recreation, and Colorado Springs offers exceptional quality of life—immediate access to world-class outdoor activities, year-round recreation, and more than 300 days of sunshine each year.
Responsibilities
- Set and drive the technical strategy for digital IP, block-level design, verification, and full-chip integration—aligning architectural choices to product differentiation, schedule, and long-term reuse.
- Lead, mentor, and scale a high-performing organization of architects, RTL designers, and verification engineers; establish clear technical expectations and a culture of ownership and excellence.
- Own program delivery from concept through tapeout and into productization—planning resources, managing schedules and milestones, and proactively driving risk retirement and trade-off decisions.
- Influence outcomes across the broader silicon ecosystem by partnering tightly with physical design, DFT/test, IP, software/firmware, packaging, systems engineering, and foundry/OSAT partners.
- Establish and enforce robust quality and signoff discipline, including design reviews, coding standards, verification closure, timing and power closure, area/constraints management, and manufacturability/yield considerations.
- Build a world-class team: recruit and hire top talent, develop technical leaders, and manage performance and career growth to retain key capabilities.
- Manage the operating model for the team, including budget ownership, EDA/tool strategy, license planning, and vendor/partner selection.
- Drive continuous improvement in productivity and predictability through design flows, automation, CI/regression infrastructure, and disciplined IP reuse strategies.
Qualifications
Must-have Qualifications
- B.S. or M.S. in Electrical Engineering, Computer Engineering, or equivalent practical experience.
- 7+ years of digital IC/ASIC development experience, with demonstrated progression in technical leadership (people management experience preferred).
- Strong hands-on depth in RTL micro-architecture and implementation (SystemVerilog/Verilog/VHDL), synthesis, STA/timing closure, and power/performance optimization.
Preferred Qualifications
- Deep expertise in modern verification, including constrained-random methodology, formal techniques, and acceleration/emulation.
- Working knowledge of the full silicon lifecycle and cross-functional handoffs, including physical design, DFT/scan, signoff flows, and foundry enablement.
- Proven ability to deliver complex programs to tapeout—building credible plans, managing dependencies and risk, and driving alignment across multiple teams.
- Proficiency with industry-standard EDA environments (e.g., Cadence and Siemens/Mentor) and productivity scripting/automation (Python, Tcl, and/or Ruby).
- Executive-level communication skills and strong stakeholder management—able to translate technical trade-offs into clear decisions and commitments.
- Sound judgment under schedule pressure, with a track record of prioritizing the right trade-offs while maintaining quality.
- Demonstrated people leadership strengths, including mentoring and coaching engineers, developing technical leaders, and building a strong team culture of accountability, learning, and engineering excellence.
ITAR statement: This position requires access to certain goods, software, technology, or technical data subject to U.S. export control laws and regulations. Under these laws and regulations, U.S. persons (which includes U.S. citizens, U.S. nationals, lawful permanent residents, refugees, and asylees) working for Keysight can access export-controlled items without authorization from the U.S. government. For any individual who is not a U.S. person, Keysight may need authorization from the U.S. Department of State, U.S. Department of Commerce, or other appropriate federal agency before the individual can access export-controlled items. Employment in this position for non-U.S. persons is contingent on Keysight’s ability to obtain any required government authorizations.
We are unable to support visa sponsorship for this position.
Most offers will be between the minimum and the midpoint of the Salary Range listed below.
MIN $151,000.00 - MAX $253,000.00
#LI-MO1
Note: For other locations, pay ranges will vary by region
US Employees may be eligible for the following benefits:
- Medical, dental and vision
- Health Savings Account
- Health Care and Dependent Care Flexible Spending Accounts
- Life, Accident, Disability insurance
- Business Travel Accident and Business Travel Health
- 401(k) Plan
- Flexible Time Off, Paid Holidays
- Paid Family Leave
- Discounts, Perks
- Tuition Reimbursement
- Adoption Assistance
- ESPP (Employee Stock Purchase Plan)
Careers Privacy Statement***Keysight is an Equal Opportunity Employer.***
Qualifications:Must-have Qualifications
- B.S. or M.S. in Electrical Engineering, Computer Engineering, or equivalent practical experience.
- 7+ years of digital IC/ASIC development experience, with demonstrated progression in technical leadership (people management experience preferred).
- Strong hands-on depth in RTL micro-architecture and implementation (SystemVerilog/Verilog/VHDL), synthesis, STA/timing closure, and power/performance optimization.
Preferred Qualifications
- Deep expertise in modern verification, including constrained-random methodology, formal techniques, and acceleration/emulation.
- Working knowledge of the full silicon lifecycle and cross-functional handoffs, including physical design, DFT/scan, signoff flows, and foundry enablement.
- Proven ability to deliver complex programs to tapeout—building credible plans, managing dependencies and risk, and driving alignment across multiple teams.
- Proficiency with industry-standard EDA environments (e.g., Cadence and Siemens/Mentor) and productivity scripting/automation (Python, Tcl, and/or Ruby).
- Executive-level communication skills and strong stakeholder management—able to translate technical trade-offs into clear decisions and commitments.
- Sound judgment under schedule pressure, with a track record of prioritizing the right trade-offs while maintaining quality.
- Demonstrated people leadership strengths, including mentoring and coaching engineers, developing technical leaders, and building a strong team culture of accountability, learning, and engineering excellence.
ITAR statement: This position requires access to certain goods, software, technology, or technical data subject to U.S. export control laws and regulations. Under these laws and regulations, U.S. persons (which includes U.S. citizens, U.S. nationals, lawful permanent residents, refugees, and asylees) working for Keysight can access export-controlled items without authorization from the U.S. government. For any individual who is not a U.S. person, Keysight may need authorization from the U.S. Department of State, U.S. Department of Commerce, or other appropriate federal agency before the individual can access export-controlled items. Employment in this position for non-U.S. persons is contingent on Keysight’s ability to obtain any required government authorizations.
We are unable to support visa sponsorship for this position.
Most offers will be between the minimum and the midpoint of the Salary Range listed below.
MIN $151,000.00 - MAX $253,000.00
#LI-MO1
Note: For other locations, pay ranges will vary by region
US Employees may be eligible for the following benefits:
- Medical, dental and vision
- Health Savings Account
- Health Care and Dependent Care Flexible Spending Accounts
- Life, Accident, Disability insurance
- Business Travel Accident and Business Travel Health
- 401(k) Plan
- Flexible Time Off, Paid Holidays
- Paid Family Leave
- Discounts, Perks
- Tuition Reimbursement
- Adoption Assistance
- ESPP (Employee Stock Purchase Plan)
Careers Privacy Statement***Keysight is an Equal Opportunity Employer.***
Education:UNAVAILABLEEmployment Type: UNAVAILABLEWhat Keysight Technologies employees say
Pay
Benefits
Hours and flexibility
Workplace
Get the full story on Breakroom
About Keysight Technologies
Sourced by ZipRecruiter
Industry
Electrical equipment, appliance, and component manufacturing
Company size
10,000+ Employees
Headquarters location
Santa Rosa, CA, US
Year founded
1937