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Asic Verification Engineer Jobs in Colorado (NOW HIRING)

Broadcom

IC Design Engineer

Fort Collins, CO · On-site

Broadcom's ASIC Products Division is seeking a Design Automation Software Development Engineer in ... well as verification that the logic is implemented correctly. Other tools are used in the ...

Broadcom

Design Engineer

Fort Collins, CO

$60K - $96K/yr

Be part of the Custom Silicon Design Team within Broadcom's ASIC Products Division in beautiful ... Utilize both commercial and in-house EDA tools for design, implementation, and verification.

Ursa Major

Staff FPGA Design Engineer

Berthoud, CO · On-site

$123K - $169K/yr

Architect and generate ASIC/FPGA RTL code * Generate test cases and run simulations to verify ... S. in Electrical Engineering with 10+ years of direct experience in electronics hardware and ASIC ...

Broadcom, Inc.

Design Engineer

Fort Collins, CO · On-site

$60K - $96K/yr

Be part of the Custom Silicon Design Team within Broadcom's ASIC Products Division in beautiful ... Utilize both commercial and in-house EDA tools for design, implementation, and verification.

Chipton Ross

FPGA Design Engineer

Littleton, CO · On-site

$100/hr

Job #216852 Chipton-Ross is seeking an FPGA Design Engineer for a contract opportunity in Littleton ... ASIC/FPGA verification experience with modern verification methodologies such as UVM, OVM or VMM ...

Ursa Major

Staff FPGA Design Engineer

Berthoud, CO · On-site

$123K - $169K/yr

Architect and generate ASIC/FPGA RTL code * Generate test cases and run simulations to verify ... S. in Electrical Engineering with 10+ years of direct experience in electronics hardware and ASIC ...

Ursa Major

Staff FPGA Design Engineer

Berthoud, CO · On-site

$123K - $169K/yr

Architect and generate ASIC/FPGA RTL code * Generate test cases and run simulations to verify ... S. in Electrical Engineering with 10+ years of direct experience in electronics hardware and ASIC ...

CONMED

Senior Electrical Engineer

Englewood, CO

$104K - $163K/yr

Experience with programmable logic or digital hardware design (FPGA/ASIC/HDL) * Design verification engineering experience * Experience working in a regulated industry * Experience using Product ...

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All JobsAsic Verification Engineer JobsAsic Verification Engineer Jobs in Colorado

Asic Verification Engineer information

See Colorado salary details

$92.5K

$164.1K

$217.7K

How much do asic verification engineer jobs pay per year?

As of Aug 10, 2026, the average yearly pay for asic verification engineer in Colorado is $164,117.00, according to ZipRecruiter salary data. Most workers in this role earn between $143,000.00 and $184,500.00 per year, depending on experience, location, and employer.

What is the salary of an ASIC verification engineer?

The salary of an ASIC verification engineer typically ranges from $80,000 to $150,000 annually, depending on experience, location, and company size. Entry-level positions may start lower, while experienced engineers with specialized skills in hardware description languages and verification tools can earn higher salaries.

What are some common challenges faced by ASIC Verification Engineers during the verification process?

ASIC Verification Engineers often encounter challenges such as dealing with complex designs, debugging intricate issues, and ensuring thorough coverage of all design specifications. Coordinating with design and RTL teams to clarify requirements and resolve discrepancies is a frequent part of the job. Additionally, managing tight project timelines while maintaining high verification quality requires effective time management and strong communication skills. Continuous learning is also important, as verification methodologies and tools evolve rapidly in this field.

What are the key skills and qualifications needed to thrive as an ASIC Verification Engineer, and why are they important?

To thrive as an ASIC Verification Engineer, you need a solid background in digital design, computer architecture, and verification methodologies, typically supported by a degree in electrical engineering or a related field. Familiarity with tools and languages like SystemVerilog, UVM, simulation environments, and waveform viewers is essential, and certifications in verification or design may be beneficial. Strong analytical thinking, attention to detail, and effective communication are crucial soft skills for debugging complex designs and collaborating with design teams. These skills and qualities are vital to ensure that ASIC designs are thoroughly tested, compliant with specifications, and delivered with high quality and reliability.

What does an ASIC verification engineer do?

An ASIC verification engineer designs and executes tests to ensure that integrated circuit designs function correctly according to specifications. They develop test plans, write simulation testbenches using hardware description languages like SystemVerilog, and analyze simulation results to identify and fix design issues. This role requires knowledge of digital design, verification tools, and often involves working closely with design engineers throughout the development process.

What is an ASIC Verification Engineer?

An ASIC Verification Engineer is a professional who specializes in testing and validating the design of Application-Specific Integrated Circuits (ASICs) to ensure they function correctly according to specifications. They develop testbenches, write test cases, and use simulation tools to detect and debug design errors before the chip is manufactured. Their work is critical in preventing costly mistakes and ensuring the final product meets performance and reliability standards. ASIC Verification Engineers often collaborate closely with design engineers to understand requirements and resolve issues.

What is the difference between Asic Verification Engineer vs Digital Design Engineer?

AspectAsic Verification EngineerDigital Design Engineer
Primary FocusVerifying ASIC designs for correctness and functionalityDesigning digital circuits and architectures
Skills & CertificationsHardware description languages (HDL), verification tools, scriptingHDL, digital logic, circuit design
Work EnvironmentVerification labs, simulation environmentsDesign teams, CAD tools, prototyping labs
Industry UsageSemiconductor, electronics manufacturingSemiconductor, consumer electronics, computing

While both roles require expertise in HDL and semiconductor industry experience, Asic Verification Engineers focus on testing and validating ASIC designs, ensuring they meet specifications. Digital Design Engineers primarily create and develop digital circuits. Both roles are essential in the chip development process but differ in their core responsibilities and daily tasks.

What is an ASIC Verification Engineer?

An ASIC verification engineer works with system designers and architects to test performance and validate hardware components and systems. You plan and develop a verification environment while coordinating with developers and architects throughout the design process. Your duties involve working closely with these other teams during the design process. Your responsibilities may include using computer hardware languages such as Verilog. In this career, you work on hardware design and use algorithms, data structure analysis, and other advanced design techniques.

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Asic Verification Engineer jobs near you
Infographic showing various Asic Verification Engineer job openings in Colorado as of August 2026, with employment types broken down into 90% Full Time, 6% Part Time, and 4% Contract. Highlights an 87% Physical, 4% Hybrid, and 9% Remote job distribution, with an average salary of $164,117 per year, or $78.9 per hour.

ASIC Digital Physical Design Manager

Keysight Technologies, Inc.

Colorado Springs, CO • On-site

$134K - $138K/yr

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Re-posted 13 days ago

Keysight Technologies rating

8.1

Company rating: 8.1 out of 10

Based on 20 frontline employees who took The Breakroom Quiz

49th of 156 rated electronics manufacturers

Job description

Overview
Keysight is at the forefront of technology innovation, delivering breakthroughs and trusted insights in electronic design, simulation, prototyping, test, manufacturing, and optimization. Our ~15,000 employees create world-class solutions in communications, 5G, automotive, energy, quantum, aerospace, defense, and semiconductor markets for customers in over 100 countries. Learn more about what we do.
Our award-winning culture embraces a bold vision of where technology can take us and a passion for tackling challenging problems with industry-first solutions. We believe that when people feel a sense of belonging, they can be more creative, innovative, and thrive at all points in their careers.
This role sits within Keysight Laboratories-a globally recognized technology organization that enables Keysight to be first to market with breakthrough, highly differentiated solutions. Our team of senior engineers has delivered generations of innovation across ASIC and product development, spanning the breadth of the technology landscape. You'll join a high-performance, globally connected engineering organization designing and delivering next-generation Digital and Mixed signal ASICs.
A sustained driver of Keysight's success is the creation and deployment of breakthrough digital and mixed-signal ASICs that unlock step-function performance and customer value in new products. We are seeking an ASIC Physical Design R&D Manager to lead our ASIC Physical Design team-overseeing end-to-end physical implementation and ensuring designs meet aggressive performance, power, and area targets through tapeout and into product development.
The position is based in Colorado Springs at the foot of Pikes Peak, with a purpose-built development campus that brings engineering, advanced technology development, assembly, and machining together in one location. Outside the lab, the campus supports an active lifestyle with on-site fitness and recreation, and Colorado Springs offers exceptional quality of life-immediate access to world-class outdoor activities, year-round recreation, and more than 300 days of sunshine each year.
Responsibilities
  • Drive the physical design technical strategy across programs, including floorplanning, power architecture, and implementation trade-offs to meet PPA (performance, power, area) targets.
  • Lead, mentor, and grow a high-performing Physical Design team; set clear expectations for technical rigor, execution, and delivery.
  • Oversee physical implementation for digital, mixed-signal, and third-party IP-from block to subsystem to top-level integration-including place and route, timing closure, and power closure.
  • Coordinate closely with RTL/design, DFT/test, packaging, and systems teams to ensure clean handoffs, rapid issue resolution, and aligned delivery through tapeout.
  • Own and continuously improve the Physical Design flow, including methodology, automation, CI/regression infrastructure, and best-practice enablement for predictability and quality.
  • Lead physical verification and signoff (DRC/LVS, STA, power/IR/EM, reliability as applicable) and drive tape release readiness with clear signoff criteria.
  • Serve as the primary physical design interface to external CMOS/BiCMOS foundries and partners, ensuring alignment on PDKs, signoff requirements, and tapeout execution.
  • Own project execution across the physical design lifecycle-planning, resourcing, schedules, milestones, and risk mitigation-to deliver predictable tapeouts and product readiness.

Qualifications
Must-have Qualifications
  • B.S. or M.S. in Electrical Engineering or Computer Engineering (or equivalent experience).
  • 7+ years of relevant experience in digital ASIC physical design, including successful tape releases.
  • 5+ years of project/program management experience, including planning, dependency management, risk tracking, and cross-team execution to tapeout.

Preferred Qualifications
  • Demonstrated people leadership, including mentoring and coaching engineers, developing future technical leaders, and building an inclusive, high-accountability culture.
  • Expertise in physical implementation and layout methodology, including timing closure, signoff, and power/performance/area optimization.
  • Working knowledge of DFT methodologies (e.g., scan insertion/test considerations) and how they impact physical design, closure, and tape release.
  • Strong EE fundamentals with experience spanning ASIC design concepts, IP integration, and CMOS/BiCMOS processes.
  • Strong teamwork and problem-solving skills, with clear written and verbal communication across engineering and program stakeholders.
  • Leadership skills to drive change and influence cross-functional teams toward execution goals, quality, and predictable delivery.
  • Sound technical judgment under schedule pressure, with a track record of making effective PPA trade-offs while maintaining signoff quality.

ITAR statement: This position requires access to certain goods, software, technology, or technical data subject to U.S. export control laws and regulations. Under these laws and regulations, U.S. persons (which includes U.S. citizens, U.S. nationals, lawful permanent residents, refugees, and asylees) working for Keysight can access export-controlled items without authorization from the U.S. government. For any individual who is not a U.S. person, Keysight may need authorization from the U.S. Department of State, U.S. Department of Commerce, or other appropriate federal agency before the individual can access export-controlled items. Employment in this position for non-U.S. persons is contingent on Keysight's ability to obtain any required government authorizations.
We are unable to support visa sponsorship for this position.
MIN $151,000.00 - MAX $253,000.00
Most offers will be between the minimum and the midpoint of the Salary Range listed above.
#LI-MO1
Note: For other locations, pay ranges will vary by region
US Employees may be eligible for the following benefits:
  • Medical, dental and vision
  • Health Savings Account
  • Health Care and Dependent Care Flexible Spending Accounts
  • Life, Accident, Disability insurance
  • Business Travel Accident and Business Travel Health
  • 401(k) Plan
  • Flexible Time Off, Paid Holidays
  • Paid Family Leave
  • Discounts, Perks
  • Tuition Reimbursement
  • Adoption Assistance
  • ESPP (Employee Stock Purchase Plan)

Careers Privacy Statement***Keysight is an Equal Opportunity Employer.***

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