Mckinney, TX · On-site
$114K - $157K/yr
Support design verification utilizing self-checking techniques with directed and constrained random ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Mckinney, TX · On-site
$114K - $157K/yr
Support design verification utilizing self-checking techniques with directed and constrained random ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Mckinney, TX · On-site
$120K - $155K/yr
Support design verification utilizing self-checking techniques with directed and constrained random ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Mckinney, TX · On-site
$120K - $155K/yr
Support design verification utilizing self-checking techniques with directed and constrained random ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Support design verification utilizing self-checking techniques with directed and constrained random ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Support design verification utilizing self-checking techniques with directed and constrained random ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Support design verification utilizing self-checking techniques with directed and constrained random ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Support design verification utilizing self-checking techniques with directed and constrained random ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Support design verification utilizing self-checking techniques with directed and constrained random ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Support design verification utilizing self-checking techniques with directed and constrained random ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Support design verification utilizing self-checking techniques with directed and constrained random ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Support design verification utilizing self-checking techniques with directed and constrained random ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Support design verification utilizing self-checking techniques with directed and constrained random ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Support design verification utilizing self-checking techniques with directed and constrained random ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Mckinney, TX · On-site
$114K - $157K/yr
Support design verification utilizing self-checking techniques with directed and constrained random ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Mckinney, TX · On-site
$114K - $157K/yr
Support design verification utilizing self-checking techniques with directed and constrained random ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Support design verification utilizing self-checking techniques with directed and constrained random ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Support design verification utilizing self-checking techniques with directed and constrained random ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Support design verification utilizing self-checking techniques with directed and constrained random ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Support design verification utilizing self-checking techniques with directed and constrained random ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Support design verification utilizing self-checking techniques with directed and constrained random ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Support design verification utilizing self-checking techniques with directed and constrained random ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Mckinney, TX · On-site
$100 - $125/hr
Experience with FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification ... directed energy, hypersonics, avionics and cybersecurity. The company, formed in 2020 through the ...
New
Mckinney, TX · On-site
$100 - $125/hr
Experience with FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification ... directed energy, hypersonics, avionics and cybersecurity. The company, formed in 2020 through the ...
New
Mckinney, TX · On-site
$148K - $155K/yr
Enable career development for direct reports * Develop training curricula, provide technical and ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Mckinney, TX · On-site
$148K - $155K/yr
Enable career development for direct reports * Develop training curricula, provide technical and ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
$114K - $157K/yr
Support design verification utilizing self-checking techniques with directed and constrained random ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
$114K - $157K/yr
Support design verification utilizing self-checking techniques with directed and constrained random ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Mckinney, TX · On-site
$148K - $155K/yr
Enable career development for direct reports * Develop training curricula, provide technical and ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Mckinney, TX · On-site
$148K - $155K/yr
Enable career development for direct reports * Develop training curricula, provide technical and ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Mckinney, TX · On-site
$148K - $155K/yr
Enable career development for direct reports * Develop training curricula, provide technical and ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Mckinney, TX · On-site
$148K - $155K/yr
Enable career development for direct reports * Develop training curricula, provide technical and ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Mckinney, TX · On-site
Enable career development for direct reports * Develop training curricula, provide technical and ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Mckinney, TX · On-site
Enable career development for direct reports * Develop training curricula, provide technical and ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Mckinney, TX · On-site
$100 - $125/hr
Support design verification utilizing self‑checking techniques with directed and constrained ... FPGA/ASIC design (VHDL and/or Verilog) or verification (SystemVerilog) experience with AMD (Xilinx ...
Mckinney, TX · On-site
$100 - $125/hr
Support design verification utilizing self‑checking techniques with directed and constrained ... FPGA/ASIC design (VHDL and/or Verilog) or verification (SystemVerilog) experience with AMD (Xilinx ...
Mckinney, TX · On-site
$150 - $200/hr
Verify designs utilizing self-checking techniques with directed and constrained random tests, while ... Experience with FPGA/ASIC design (VHDL and/or Verilog) or verification (System Verilog) and with ...
Mckinney, TX · On-site
$150 - $200/hr
Verify designs utilizing self-checking techniques with directed and constrained random tests, while ... Experience with FPGA/ASIC design (VHDL and/or Verilog) or verification (System Verilog) and with ...
Designs are verified against requirements using both directed test and constrained random ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Designs are verified against requirements using both directed test and constrained random ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
| Aspect | Asic Director | Asic Engineer |
|---|---|---|
| Credentials | Typically requires a Bachelor's or Master's in Electrical Engineering or Computer Engineering; leadership experience | Requires a Bachelor's or Master's in Electrical Engineering or Computer Engineering; technical expertise |
| Work Environment | Leadership roles overseeing teams, project management, strategic planning | Design, develop, and test ASIC chips; hands-on technical work |
| Industry Usage | Used in companies designing complex integrated circuits, often in senior or managerial contexts | Commonly employed in semiconductor companies, focusing on chip design and verification |
The main difference between an Asic Director and an Asic Engineer lies in their responsibilities and experience level. The Asic Director oversees teams and strategic projects, requiring leadership skills and experience, while the Asic Engineer focuses on technical design and development of ASIC chips. Both roles require similar educational backgrounds, but their scope and focus differ significantly.
For Asic Director jobs in Addison, TX, the most frequently searched job titles are:
Cities near Addison, TX with the most Asic Director job openings:
$114K - $157K/yr
Full-time
Medical, Dental, Vision, Life, Retirement, PTO
Re-posted 4 days ago
8.2
Based on 86 frontline employees who took The Breakroom Quiz
38th of 72 rated aerospace companies
Date Posted:
2026-07-16Country:
United States of AmericaLocation:
US-TX-MCKINNEY-513WD ~ 2501 W University Dr ~ WING D BLDGPosition Role Type:
OnsiteU.S. Citizen, U.S. Person, or Immigration Status Requirements:
The ability to obtain and maintain a U.S. government issued security clearance is required. U.S. citizenship is required, as only U.S. citizens are eligible for a security clearanceSecurity Clearance Type:
DoD Clearance: SecretSecurity Clearance Status:
Active and existing security clearance required after day 1At Raytheon, the foundation of everything we do is rooted in our values and a higher calling – to help our nation and allies defend freedoms and deter aggression. We bring the strength of more than 100 years of experience and renowned engineering expertise to meet the needs of today’s mission and stay ahead of tomorrow’s threat. Our team solves tough, meaningful problems that create a safer, more secure world.
The Multi-Product Power & Digital (MPD) department designs FPGAs, circuit cards, and electronics subassemblies for a range of products including missiles/effectors, radars, and electronic warfare systems. The team leverages digital, analog, and power design skills to provide support throughout the product lifecycle from architecture and design through production and sustainment.
We are currently seeking an FPGA Engineer II to join our team.
This position is an onsite role, located in McKinney, TX.
What You Will Do
Provide full lifecycle support of production quality FPGA designs for one or more major vendors and device families including: AMD (Xilinx), Altera, and Microchip (Microsemi).
Generate FPGA designs for the following applications: gigabit serial interfaces, Radio Frequency (RF) DSP, controls, data links, embedded processing and processor interfaces.
Assist with architecture development of FPGA-based systems to determine parts, interfaces, and Concept of Operations (CONOPS).
Design and code in VHDL for reliability and maintainability.
Support design verification utilizing self-checking techniques with directed and constrained random tests, while tracking functional and code coverage.
Understand and report execution status to the planned budget and schedule using an agile framework.
Create complete documentation including requirements, verification plan, and user’s guides.
Function as an individual contributor.
Clearly present your work product to leadership.
Engage in professional growth and development.
Qualifications You Must Have
Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and a minimum of 2 years of prior relevant experience.
Experience to include one or more of the following:
FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Experience with AMD (Xilinx), Altera and/or Microchip (Microsemi) devices and with tools such as AMD Vivado, Altera Quartus Prime Pro or Libero.
Hands-on experience with integration and debug of FPGA/ASIC in a lab environment
Experience with source code management, design reviews, and code release in a team development environment.
Qualifications We Value
One or more advanced degrees in Electrical Engineering or a related Science, Technology, Engineering, or Mathematics (STEM) major. A suitable degree may be counted as 2 years of work experience.
FPGA/ASIC design experience in one or more of the following areas:
Embedded systems design using ARM, Microblaze, or NIOS processors
Gigabit serial interfaces and multi-gigabit transceivers (MGTs)
Constrained random verification in UVM using System Verilog
Experience with High Level Synthesis (HLS)
Experience with vector processors and/or GPUs
Experience with timing closure, clock domain crossing and reset domain crossing analysis, and constraint development.
Demonstrated ability to lead design efforts and/or small teams.
What We Offer
Our values drive our actions, behaviors, and performance with a vision for a safer, more connected world. At RTX we value: Trust, Respect, Accountability, Collaboration, and Innovation.
This position offers relocation based on candidate eligibility.
Learn More & Apply Now!
This position requires a security clearance. DCSA Consolidated Adjudication Services (DCSA CAS), an agency of the Department of Defense, handles and adjudicates the security clearance process. More information about Security Clearances can be found on the US Department of State government website here: https://www.state.gov/m/ds/clearances/c10978.htm
North Texas: https://careers.rtx.com/global/en/raytheon-north-texas-location
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As part of our commitment to maintaining a secure hiring process, candidates may be asked to attend select steps of the interview process in-person at one of our office locations, regardless of whether the role is designated as on-site, hybrid or remote.
The salary range for this role is 68,900 USD - 131,100 USD. The salary range provided is a good faith estimate representative of all experience levels. RTX considers several factors when extending an offer, including but not limited to, the role, function and associated responsibilities, a candidate’s work experience, location, education/training, and key skills. Hired applicants may be eligible for benefits, including but not limited to, medical, dental, vision, life insurance, short-term disability, long-term disability, 401(k) match, flexible spending accounts, flexible work schedules, employee assistance program, Employee Scholar Program, parental leave, paid time off, and holidays. Specific benefits are dependent upon the specific business unit as well as whether or not the position is covered by a collective-bargaining agreement. Hired applicants may be eligible for annual short-term and/or long-term incentive compensation programs depending on the level of the position and whether or not it is covered by a collective-bargaining agreement. Payments under these annual programs are not guaranteed and are dependent upon a variety of factors including, but not limited to, individual performance, business unit performance, and/or the company’s performance. This role is a U.S.-based role. If the successful candidate resides in a U.S. territory, the appropriate pay structure and benefits will apply. RTX anticipates the application window closing approximately 40 days from the date the notice was posted. However, factors such as candidate flow and business necessity may require RTX to shorten or extend the application window.RTX is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability or veteran status, or any other applicable state or federal protected class. RTX provides affirmative action in employment for qualified Individuals with a Disability and Protected Veterans in compliance with Section 503 of the Rehabilitation Act and the Vietnam Era Veterans’ Readjustment Assistance Act.
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Guided missile and space vehicle manufacturing, it services, aerospace product and parts manufacturing and engineering professional services
10,000+ Employees
Waltham, MA, US
