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Asic Design Verification Jobs in Raleigh, NC (NOW HIRING)

Senior Engineer, Design Verification

Morrisville, NC ยท On-site

$127K - $155K/yr

We are looking for individuals with a deep understanding and passion for ASIC verification to craft ... Collaborate closely with design and other verification engineers to develop and implement ...

New

NVIDIA is seeking an outstanding Senior ASIC Verification Engineer to verify the design and implementation of the world's leading SoC's and GPU's. This position offers the opportunity to have a real ...

... verified, high performance, area and power efficient RTL to achieve design targets * You will be ... Come, join our GPU ASIC team and help build the real-time, cost-effective computing platform ...

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Showing results 1-20

Asic Design Verification information

See Raleigh, NC salary details

$85.5K

$151.7K

$201.2K

How much do asic design verification jobs pay per year?

As of Jun 12, 2026, the average yearly pay for asic design verification in Raleigh, NC is $151,719.00, according to ZipRecruiter salary data. Most workers in this role earn between $132,200.00 and $170,600.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as an ASIC Design Verification Engineer, and why are they important?

To thrive as an ASIC Design Verification Engineer, you need a solid background in digital design concepts, verification methodologies, and a degree in electrical or computer engineering. Proficiency with hardware description languages like Verilog or VHDL, verification tools such as UVM/SystemVerilog, and simulation/debugging environments is essential. Strong analytical thinking, attention to detail, and effective communication skills help you identify design flaws and collaborate with cross-functional teams. These skills are critical to ensuring the reliability, efficiency, and functionality of complex integrated circuits before production.

What are some common challenges faced in ASIC Design Verification, and how can they be addressed?

One of the main challenges in ASIC Design Verification is dealing with increasing design complexity and ensuring that all functional requirements are thoroughly tested within tight project timelines. To address this, verification engineers often use advanced methodologies such as UVM (Universal Verification Methodology) and leverage automation tools for testbench creation and regression testing. Effective collaboration with design engineers is also essential to quickly resolve issues and ensure alignment between the design and verification teams. Maintaining good documentation and regularly updating test plans helps keep the verification process organized and efficient.

What is ASIC Design Verification?

ASIC Design Verification is the process of ensuring that an Application-Specific Integrated Circuit (ASIC) design functions as intended before it is manufactured. This involves creating and running tests, simulations, and checks to detect and correct errors in the design. Verification engineers use specialized tools and methodologies such as simulation, formal verification, and emulation to verify the logic and performance of the ASIC. Thorough verification helps prevent costly mistakes and ensures the final chip meets all specifications.
What are popular job titles related to Asic Design Verification jobs in Raleigh, NC? For Asic Design Verification jobs in Raleigh, NC, the most frequently searched job titles are:
What cities near Raleigh, NC are hiring for Asic Design Verification jobs? Cities near Raleigh, NC with the most Asic Design Verification job openings:
Infographic showing various Asic Design Verification job openings in Raleigh, NC as of June 2026, with employment types broken down into 100% Full Time. Highlights an 33% In-person, and 67% Hybrid job distribution, with an average salary of $151,719 per year, or $72.9 per hour.
Senior Principal Engineer, Design Verification

Senior Principal Engineer, Design Verification

Marvell Technology, Inc.

Morrisville, NC โ€ข On-site

Full-time

Life, Retirement

Posted 2 days ago


Job description

About Marvell
Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
Marvell's CXL Product Development team works on groundbreaking innovations for the composable datacenter. We are looking for individuals with a deep understanding and passion for ASIC verification to craft creative solutions for DV architecture, verification and post-silicon validation on some of the industry's most complex semiconductor chips. If you're creative and autonomous, we want to hear from you! At Marvell, you will have the opportunity to shape some of the most incredible products to address the needs of the next generation datacenters.
What You Can Expect
As a member of a dynamic ASIC development team, the candidate will be responsible for leading verification architecture, execution, delivery, post silicon validation , emulation of the next generation ASICs under development working closely with cross functional teams. The member will also have an opportunity to leverage the experience to drive the ASIC front end ASIC development process, emulation, PSV, tools and methodologies leading to the successful ASIC products.
What We're Looking For
  • Bachelor's degree in Computer Science, Electrical Engineering or related fields and 20+ years of related professional experience.
  • Master's degree in Computer Science, Electrical Engineering or related fields with 18+ years of experience.PhD in Computer Science, Electrical Engineering or related fields with 12+ years of experience.
  • Strong understanding of ASIC development process, tools and verification methodologies.
  • Demonstrated track record of leading verification and delivery high quality ASICs.
  • Hands-on experience in verification of multiple SoC architectures, processor cores, memory subsystems and peripheral interfaces.
  • Hands-on experience of bringing up multiple ASICs in the lab.
  • Hands-on experience in driving emulation efforts leading to successful tapeout
  • Proven ability of leading ASIC development teams.
  • Excellent communication, interpersonal and presentation skills.
  • Strong cross-functional leadership skills.
  • Highly motivated, self-driven and ability to drive adoption of new methodologies.

Expected Base Pay Range (USD)
184,400 - 272,950, $ per annum
The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.
Additional Compensation and Benefit Elements
Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life's most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.
Interview Integrity
To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.
This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.
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