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Asic Design Verification Jobs in Raleigh, NC (NOW HIRING)

NVIDIA is seeking an outstanding Senior ASIC Verification Engineer to verify the design and implementation of the world's leading SoC's and GPU's. This position offers the opportunity to have a real ...

... verified, high performance, area and power efficient RTL to achieve design targets * You will be ... Come, join our GPU ASIC team and help build the real-time, cost-effective computing platform ...

Your role will be cross disciplinary, collaborating with industry partners, customers, internal architects, software, ASIC design, verification, and platform teams. Our software architects excel at ...

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Asic Design Verification information

See Raleigh, NC salary details

$85.5K

$151.7K

$201.2K

How much do asic design verification jobs pay per year?

As of Aug 14, 2026, the average yearly pay for asic design verification in Raleigh, NC is $151,719.00, according to ZipRecruiter salary data. Most workers in this role earn between $132,200.00 and $170,600.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as an ASIC Design Verification engineer?

To thrive as an ASIC Design Verification Engineer, you need a solid background in digital design concepts, verification methodologies, and a degree in electrical or computer engineering. Proficiency with hardware description languages like Verilog or VHDL, verification tools such as UVM/SystemVerilog, and simulation/debugging environments is essential. Strong analytical thinking, attention to detail, and effective communication skills help you identify design flaws and collaborate with cross-functional teams. These skills are critical to ensuring the reliability, efficiency, and functionality of complex integrated circuits before production.

What are some common challenges faced in ASIC Design Verification, and how can they be addressed?

One of the main challenges in ASIC Design Verification is dealing with increasing design complexity and ensuring that all functional requirements are thoroughly tested within tight project timelines. To address this, verification engineers often use advanced methodologies such as UVM (Universal Verification Methodology) and leverage automation tools for testbench creation and regression testing. Effective collaboration with design engineers is also essential to quickly resolve issues and ensure alignment between the design and verification teams. Maintaining good documentation and regularly updating test plans helps keep the verification process organized and efficient.

What is ASIC Design Verification?

ASIC Design Verification is the process of ensuring that an Application-Specific Integrated Circuit (ASIC) design functions as intended before it is manufactured. This involves creating and running tests, simulations, and checks to detect and correct errors in the design. Verification engineers use specialized tools and methodologies such as simulation, formal verification, and emulation to verify the logic and performance of the ASIC. Thorough verification helps prevent costly mistakes and ensures the final chip meets all specifications.

What are popular job titles related to Asic Design Verification jobs in Raleigh, NC?

For Asic Design Verification jobs in Raleigh, NC, the most frequently searched job titles are:

What job categories do people searching Asic Design Verification jobs in Raleigh, NC look for?

The top searched job categories for Asic Design Verification jobs in Raleigh, NC are:

What cities near Raleigh, NC are hiring for Asic Design Verification jobs?

Cities near Raleigh, NC with the most Asic Design Verification job openings:

Infographic showing various Asic Design Verification job openings in Raleigh, NC as of August 2026, with employment types broken down into 100% Full Time. Highlights an 50% In-person, and 50% Hybrid job distribution, with an average salary of $151,719 per year, or $72.9 per hour.

ASIC Verification Engineer

Hewlett Packard Enterprise

Durham, NC • Hybrid

Full-time

Re-posted 29 days ago


Hewlett Packard Enterprise rating

8.4

Company rating: 8.4 out of 10

Based on 26 frontline employees who took The Breakroom Quiz

36th of 157 rated electronics manufacturers


Job description

ASIC Verification EngineerThis role has been designed as 'Hybrid' with a requirement that you will work on average 2 days per week from an HPE office.

Who We Are:

Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work. We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today's complex world.Our culture thrives onfinding new and better ways to accelerate what's next.We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs.We make bold moves, together, and are a force for good. If you are looking to stretch and grow your career our culture will embrace you.Open up opportunities with HPE.

Job Description:

This is a Hybrid role based in Durham, NC with an expectation that you'll be in the office 2 days per week.

HPE Networking is a leading provider of advanced routers and switches for the internet. We keep the world connected with speed, reliability, security, and ease of use. At HPE Networking Silicon group, we push the boundaries of what is possible in a piece of silicon die. We build cutting edge networking chips used to build our world-class routers and switches.


Bring your passion and there are no boundaries to what you can accomplish here. We are like a start-up in a big company. Year after year, our group builds the most powerful and highest density networking chips.
As part of our fast-paced silicon group, you will become an expert in building high-speed ASICs, from specifications to final netlist. We give you opportunities to work on complex modules and subsystems where you can challenge yourself and grow.
Open communications, empowerment, innovation, teamwork, and customer success are the foundations of team culture. Thus, you set your own limits for learning, achievements, and rewards.

Position Summary

We are seeking a highly motivated ASIC Verification Engineer to join our networking silicon development team.

Key Responsibilities:

Own and drive block-level or subsystem verification efforts, from creating test plans to achieving comprehensive coverage closure.

Develop, enhance, and maintain advanced UVM verification environments, including agents, sequences, scoreboards, virtual sequences, and register models.

Perform constraint-driven random testing, debug complex SoC designs, and ensure functional coverage and assertion goals are met.

Analyze simulation results using industry-leading simulation tools (e.g., Cadence Xcelium, Synopsys VCS, Mentor Questa) and debug waveforms to validate design functionality.

Collaborate with cross-functional teams to identify and resolve issues, ensuring high-quality ASIC/SoC deliverables.

Required Skills and Qualifications:

3+ years of experience in ASIC/SoC verification with a proven track record of owning verification from test plan to coverage closure.

Strong expertise in SystemVerilog and UVM methodology, including developing environments from scratch.

Deep understanding of randomization, constraints, functional coverage, and assertions (SVA).

Hands-on experience in test planning, coverage analysis, and debugging of complex SoC designs.

Proficiency with industry-standard simulation tools (e.g., Cadence Xcelium, Synopsys VCS, Mentor Questa) and waveform debugging.

Preferred Skills and Experience:

  • Experience verifying networking ASICs or router datapath/control blocks, such as packet processing, forwarding engines, or fabric interfaces.

  • Familiarity with high-speed interconnects, buffers, or scheduling pipelines in large networking SoCs.

  • Exposure to emulation environments, hardware acceleration, or traffic-model integration.

  • Knowledge of coverage analytics, regression dashboards, and continuous-integration flows (e.g., Jenkins).

  • Understanding of low-power (UPF) or formal verification methodologies.

  • Own and drive block-level/subsystem/FullChip verification efforts, from creating test plans to achieving comprehensive coverage closure

  • Experience with post-silicon bring-up and debug is a plus.

  • Familiarity with emulation environments and debug flows is desirable.

What We Can Offer You:

Health & Wellbeing

We strive to provide our team members and their loved ones with a comprehensive suite of benefits that supports their physical, financial and emotional wellbeing.

Personal & Professional Development

We also invest in your career because the better you are, the better we all are. We have specific programs catered to helping you reach any career goals you have - whether you want to become a knowledge expert in your field or apply your skills to another division.

Unconditional Inclusion

We are unconditionally inclusive in the way we work and celebrate individual uniqueness. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good.

Let's Stay Connected:

Follow @HPECareers on Instagram to see the latest on people, culture and tech at HPE.

#unitedstates

Job:

Engineering

Job Level:

TCP_03"The expected salary/wage range for this position is provided below. Actual offer may vary from this range based upon geographic location, work experience, education/training, and/or skill level.
- United States of America: Annual Salary USD 105,500 - 243,000 in North Carolina
The listed salary range reflects base salary. Variable incentives may also be offered."

Information about employee benefits offered in the US can be found at https://myhperewards.com/main/new-hire-enrollment.html

HPE is an Equal Employment Opportunity/ Veterans/Disabled/LGBT employer. We do not discriminate on the basis of race, gender, or any other protected category, and all decisions we make are made on the basis of qualifications, merit, and business need. Our goal is to be one global team that is representative of our customers, in an inclusive environment where we can continue to innovate and grow together. Please click here: Equal Employment Opportunity.

Hewlett Packard Enterprise is EEO Protected Veteran/ Individual with Disabilities.

HPE will comply with all applicable laws related to employer use of arrest and conviction records, including laws requiring employers to consider for employment qualified applicants with criminal histories.

Recruitment Fraud Alert

We have become aware of an increase in fraudulent recruitment activities in which individuals impersonate our company or authorized recruitment agencies to offer fake employment opportunities. These scams may occur through false websites, emails, social media, or chat-based applications and often aim to obtain personal information or money. Please note that Hewlett Packard Enterprise (HPE), its direct and indirect subsidiaries and affiliated companies, and its authorized recruitment agencies/vendors will never charge a candidate a registration fee, hiring fee, or any other fee in connection with its recruitment and hiring process. We also never request personal information such as back account details, Social Security numbers, or national IDs via social media or chat applications.

All legitimate job opportunities will come through official company channels, and candidates are responsible for verifying the credentials of any third party claiming to represent the company. Any reliance on fraudulent communication is at the individual's own risk, and HPE disclaims legal liability for any resulting damages. If you suspect recruitment fraud, do not share personal information or make any payments and report the incident to your local authorities immediately.


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