1

Asic Design Firmware Engineer Jobs (NOW HIRING)

Lead silicon bring-up and validation of PCIe links in the lab; work closely with board and firmware ... Engineering, or related field. * 10+ years of industry experience in ASIC/SoC design with a focus ...

Principal ASIC Design Engineer Description: Expertise in at least 3 of the following: communication system design, RF radio design, digital ASIC design, applications platforms, and semiconductor ...

Principal ASIC Design Verification Engineer

OR ยท On-site +1

$190K - $285K/yr

Work closely with architecture, RTL design, DFT, firmware, physical design, and silicon validation ... Engineering, or related field. * 10+ years of experience in ASIC/SoC verification. * Solid ...

Lead silicon bring-up and validation of PCIe links in the lab; work closely with board and firmware ... Engineering, or related field. * 10+ years of industry experience in ASIC/SoC design with a focus ...

We are now looking for a Senior ASIC Design Engineer to join our System ASIC team! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 fueled the growth of ...

We are now looking for a Senior ASIC Design Engineer to join our System ASIC team. NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 fueled the growth of ...

We are now looking for a Senior ASIC Design Engineer to join our System ASIC team. NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 fueled the growth of ...

We're seeking engineers who are energized by working on cutting-edge ASIC design and distributed ... Support post-silicon validation, collaborating with hardware, firmware, and software teams to debug ...

Work closely with architecture, RTL design, DFT, firmware, physical design, and silicon validation ... Engineering, or related field. * 5+ years of experience in ASIC/SoC verification. * Solid ...

ASIC Design Engineer

Santa Clara, CA ยท On-site

$126K - $190K/yr

OR Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience. OR PhD in Science, Engineering, or related ...

Senior ASIC Design Engineer

Boulder, CO ยท On-site

$140K - $175K/yr

Join a world-class team of scientists, engineers, and business professionals to advance the state-of-the-art in quantum computing. Atom Computing is seeking a Senior ASIC Designer to design and ...

Showing results 41-60

Asic Design Firmware Engineer information

See salary details

$75K

$167.4K

$205K

How much do asic design firmware engineer jobs pay per year?

As of Sep 13, 2026, the average yearly pay for asic design firmware engineer in the United States is $167,438.00, according to ZipRecruiter salary data. Most workers in this role earn between $143,000.00 and $205,000.00 per year, depending on experience, location, and employer.

What is an ASIC Design Firmware Engineer?

ASIC Design Firmware Engineers are professionals who develop and integrate firmware to control and manage Application-Specific Integrated Circuits (ASICs). They work closely with hardware design teams to write, debug, and optimize low-level code that enables ASICs to function as intended within electronic systems. Their role bridges the gap between hardware and software, ensuring efficient communication and performance. These engineers often use languages like C, C++, and sometimes hardware description languages to program and test embedded systems.

How do ASIC Design Firmware Engineers typically collaborate with hardware and software teams during the product development cycle?

ASIC Design Firmware Engineers play a crucial role in bridging the gap between hardware and software teams. They collaborate closely with hardware engineers to ensure the firmware interfaces correctly with the ASIC's architecture and meets performance requirements. Simultaneously, they work with software engineers to provide necessary APIs, documentation, and debugging support. This cross-functional teamwork is essential for early identification of integration issues and for delivering a reliable, high-performance product.

What are the key skills and qualifications needed to thrive as an ASIC Design Firmware Engineer, and why are they important?

To thrive as an ASIC Design Firmware Engineer, you need a solid background in digital design, embedded systems, and programming languages like C/C++ or Verilog, often supported by a degree in electrical engineering or computer engineering. Familiarity with hardware description languages (HDLs), FPGA prototyping tools, and version control systems is typically required. Strong problem-solving, attention to detail, and effective communication skills help you excel in cross-functional teams and manage complex design challenges. These competencies are essential for delivering robust, efficient ASIC solutions that meet rigorous technical and industry standards.

What is the difference between Asic Design Firmware Engineer vs FPGA Design Engineer?

AspectAsic Design Firmware EngineerFPGA Design Engineer
CredentialsBachelor's/Master's in Electrical Engineering, Computer Engineering, or related fields; knowledge of hardware description languagesBachelor's/Master's in Electrical Engineering, Computer Engineering, or related fields; proficiency in HDL languages
Work EnvironmentDesigning firmware for ASIC chips in semiconductor companies or integrated circuit firmsDeveloping FPGA-based prototypes and solutions in electronics or embedded systems companies
Industry UsageUsed in ASIC chip development, embedded systems, and custom hardware solutionsUsed in prototyping, testing, and custom hardware design for various applications

The main difference is that Asic Design Firmware Engineers focus on developing firmware for ASIC chips, which are custom-designed integrated circuits, while FPGA Design Engineers work on creating and testing FPGA-based hardware solutions. Both roles require similar technical skills and certifications but differ in their application and development environment.

What cities are hiring for Asic Design Firmware Engineer jobs?

Cities with the most Asic Design Firmware Engineer job openings:

What states have the most Asic Design Firmware Engineer jobs?

States with the most job openings for Asic Design Firmware Engineer jobs include:

What are popular job titles related to Asic Design Firmware Engineer jobs?

For Asic Design Firmware Engineer jobs, the most frequently searched job titles are:

PCIe ASIC Design Engineer

Austin, TX โ€ข On-site

Cornelis Networks
Software Developmentย โ€ขย 51 - 200 employees

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Re-posted 29 days ago


Job description

At Cornelis we're building the future of AI and HPC networking with an AI-first approach to silicon and software development. We're seeking engineers who are energized by working on cutting-edge ASIC design and distributed software systems, and who are motivated to push the boundaries on how AI can transform everything from chip architecture to system performance at scale.
Cornelis Networks delivers the world's highest performance scale-out networking solutions for AI and HPC datacenters. Our differentiated architecture seamlessly integrates hardware, software and system level technologies to maximize the efficiency of GPU, CPU and accelerator-based compute clusters at any scale. Our solutions drive breakthroughs in AI & HPC workloads, empowering our customers to push the boundaries of innovation. Backed by top-tier venture capital and strategic investors, we are committed to innovation, performance and scalability - solving the world's most demanding computational challenges with our next-generation networking solutions.
We are a fast-growing, forward-thinking team of architects, engineers, and business professionals with a proven track record of building successful products and companies. As a global organization, our team spans multiple U.S. states and six countries, and we continue to expand with exceptional talent in onsite, hybrid, and fully remote roles.
Cornelis Networks is hiring a Senior ASIC Design Engineer to lead the design and integration of PCIe controllers into our next-generation SoCs. The ideal candidate will have deep expertise in PCI Express protocol (Gen4/Gen5/Gen6), integration into high performance ASICs, emulation and post silicon bring-up.
Key Responsibilities:
  • Own end-to-end integration of PCIe IP into complex ASIC designs.
  • Collaborate with IP vendors, architecture, verification, physical design, and software teams to deliver robust PCIe subsystems.
  • Drive performance optimization efforts across the PCIe stack, from PHY tuning to DMA/transaction layer efficiency.
  • Contribute to system architecture and microarchitecture discussions with a focus on IO and interconnect scalability.
  • Lead silicon bring-up and validation of PCIe links in the lab; work closely with board and firmware teams.
  • Debug functional and performance issues at RTL, gate-level, and silicon.
  • Ensure compliance with PCIe specifications and participate in interoperability testing where needed.
  • Provide mentorship to junior engineers and help define PCIe subsystem development best practices.
  • Good understanding of high-bandwidth, low-latency connectivity for high-performance compute platforms

Minimum Qualifications:
  • BS/MS in Electrical Engineering, Computer Engineering, or related field.
  • 10+ years of industry experience in ASIC/SoC design with a focus on PCIe controller integration.
  • Proven experience in silicon bring-up and debug of high-speed interfaces.
  • Solid understanding of PCIe protocol stack (PHY, MAC, TLP, DLL), configuration space, and link training.
  • Hands-on experience with PCIe verification environments, performance tuning, and power-aware design.
  • Familiarity with PCIe compliance testing, simulation tools (e.g., VCS, Questa), and lab equipment (e.g., protocol analyzers, oscilloscopes).
  • Strong scripting (Python, Perl, TCL) and debugging skills.
  • Strong verbal and written communication skills.

Preferred Qualifications:
  • Experience with PCIe Gen5/Gen6 and advanced retimer or switch solutions.
  • Exposure to CXL, CCIX, or other cache-coherent interconnects.
  • Background in data center or AI/ML accelerator architectures.
  • Experience with emulation and prototyping platforms (e.g., ZeBu, Palladium, HAPS) for PCIe subsystem validation.

Location: This is a remote position for employees residing within the United States.
We offer a competitive compensation package that includes equity, cash, and incentives, along with health and retirement benefits. Our dynamic, flexible work environment provides the opportunity to collaborate with some of the most influential names in the semiconductor industry.
At Cornelis Networks your base salary is only one component of your comprehensive total rewards package. Your base pay will be determined by factors such as your skills, qualifications, experience, and location relative to the hiring range for the position. Depending on your role, you may also be eligible for performance-based incentives, including an annual bonus or sales incentives.
In addition to your base pay, you'll have access to a broad range of benefits, including medical, dental, and vision coverage, as well as disability and life insurance, a dependent care flexible spending account, accidental injury insurance, and pet insurance. We also offer generous paid holidays, 401(k) with company match, and Open Time Off (OTO) for regular full-time exempt employees. Other paid time off benefits include sick time, bonding leave, and pregnancy disability leave.
Cornelis Networks does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. Cornelis Networks is an equal opportunity employer, and all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity or expression, pregnancy, age, national origin, disability status, genetic information, protected veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.