1

Analog Mixed Signal Design Verification Manager Jobs

RF/Analog Mixed Signal Design Engineer

Sunnyvale, CA ยท On-site

$237K/yr

Description RF/Analog Mixed Signal Design Engineer will work on transistor level IC design ... Strong track record of delivering silicon IPs with complete architecture, design, verification and ...

$100K - $122K/yr

Mixed Signal Design Verification Engineer** with a strong background in analog and mixed-signal IC ... Understand power management chip architectures (ideal diodes, e-fuses, switching converters etc)

Description RF/Analog Mixed Signal Design Engineer will work on transistor level IC design ... Design blocks and document design simulation and verification towards formal design reviews. Drive ...

Showing results 21-40

Analog Mixed Signal Design Verification Manager information

See salary details

$77K

$186.2K

$203K

How much do analog mixed signal design verification manager jobs pay per year?

As of Sep 13, 2026, the average yearly pay for analog mixed signal design verification manager in the United States is $186,238.00, according to ZipRecruiter salary data. Most workers in this role earn between $202,000.00 and $202,000.00 per year, depending on experience, location, and employer.

What are popular job titles related to Analog Mixed Signal Design Verification Manager jobs?

For Analog Mixed Signal Design Verification Manager jobs, the most frequently searched job titles are:

Infographic showing various Analog Mixed Signal Design Verification Manager job openings in the United States as of August 2026, with employment types broken down into 88% Full Time, 11% Part Time, and 1% Contract. Highlights an 80% Physical, 2% Hybrid, and 18% Remote job distribution, with an average salary of $186,238 per year, or $89.5 per hour.

Analog-Mixed Signal Design Engineer

Santa Clara, CA โ€ข On-site

OMNIVISION
Software Developmentย โ€ขย 1 - 5K employees

$105K - $140K/yr

Full-time

Re-posted 5 days ago


Job description

Description
Overview :
Responsible for the design development and characterization of embedded analog circuits, such as high speed I/O, SerDes, FIFO, CDR, PLL etc.
Design and debug experience on RTL level signal synchronization, clock tree and cross domain clock designs is a significant plus.
Need to work closely with system and test engineers to develop high speed interface, package/board, and system clocks in image sensor and bridge chip products.
Responsibilities :
  • Analog/Mixed-Signal design, simulation and verifications.
  • High speed test with scope and BERT.
  • Layout design and support. Need to get involved into layout optimizations for high speed or high precision performance directly.
  • Interface verifications between analog and digital.
  • IP and design spec documentations.

Requirements :
  • Familiar with Cadence analog design/layout flow and spice/spectreMDL simulations.
  • Masters of Electrical Engineering or PhD

Annual base salary for this role in California, US is expected to be between $105,000 - $140,000. Actual pay will be determined on a number of factors such as relevant skills, education, experience, and the pay of employees in the similar role.