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Analog Mixed Signal Board Design Engineer Jobs (NOW HIRING)

Ayar Labs

Director, Analog/Mixed-Signal Design

San Jose, CA · On-site

$240K - $300K/yr

S. in Electrical Engineering * 12+ years of industry experience in analog/mixed signal design ... Track record of production tapeouts in advanced FinFET CMOS nodes * Demonstrated ability to deliver ...

Apple

RF/Analog Mixed Signal Design Engineer

Sunnyvale, CA · On-site

$237K/yr

Description RF/Analog Mixed Signal Design Engineer will work on transistor level IC design implementation for Apple Silicon in different technology nodes. Minimum Qualifications Minimum requirement ...

Apple

RF/Analog Mixed Signal Design Engineer

Sunnyvale, CA · On-site

$237K/yr

Description RF/Analog Mixed Signal Design Engineer will work on transistor level IC design implementation for Apple Silicon in different technology nodes. Minimum Qualifications BS and a minimum of ...

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How much do analog mixed signal board design engineer jobs pay per year?

As of Sep 11, 2026, the average yearly pay for analog mixed signal board design engineer in the United States is $186,238.00, according to ZipRecruiter salary data. Most workers in this role earn between $202,000.00 and $202,000.00 per year, depending on experience, location, and employer.

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Infographic showing various Analog Mixed Signal Board Design Engineer job openings in the United States as of August 2026, with employment types broken down into 90% Full Time, 7% Part Time, and 3% Contract. Highlights an 81% Physical, 5% Hybrid, and 14% Remote job distribution, with an average salary of $186,238 per year, or $89.5 per hour.

Principal Analog Mixed-Signal Design Engineer

San Jose, CA • On-site

Astera Labs
Semiconductor and Electronic Component Manufacturing • 11 - 50 employees
Learn more about Astera Labsexternal

$207K - $230K/yr

Full-time

Re-posted 12 days ago

Job description

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs' Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company's custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.
Role Overview
Astera Labs is redefining the connectivity that powers rack-scale AI infrastructure, and analog design is at the heart of it. As a Principal Analog Design Engineer, you will architect and design the high-performance analog and mixed-signal circuits that anchor our SerDes, PHY, and high-speed I/O - the silicon building blocks that move data at the speed AI demands. Your work directly shapes the performance, power, and reliability of products deployed in the world's most advanced data centers.
This is a high-impact, hands-on role at a hyper-growth company purpose-built for AI connectivity. You will own designs from concept through silicon bring-up, set the technical bar for the analog team, and mentor engineers as we scale. If you want your circuits to enable the next generation of AI compute, this is where that happens.
Key Responsibilities
  • Analog & Mixed-Signal Design
    • Architect and design high-speed analog and mixed-signal circuits including PLLs, LDOs, references, high-speed SerDes building blocks, ADCs/DACs, and clocking.
    • Drive circuit design from specification and architecture through schematic, layout supervision, and verification across PVT corners.
    • Develop robust designs in advanced FinFET process nodes with attention to power, area, and performance trade-offs.
  • Silicon Execution & Validation
    • Lead silicon bring-up, characterization, and debug, partnering with validation and product engineering to root-cause and resolve issues.
    • Define and execute test plans to correlate silicon performance against design targets.
  • Technical Leadership
    • Set analog design methodology, review standards, and best practices across the team.
    • Partner cross-functionally with digital, physical design, systems, and architecture teams to deliver full-chip solutions.
    • Mentor and guide junior engineers, elevating the technical capability of the analog organization.
Basic Qualifications
  • MS or PhD in Electrical Engineering or a related field.
  • 8+ years of experience in analog and mixed-signal integrated circuit design.
  • Proven track record designing high-speed analog circuits such as PLLs, SerDes front-ends, data converters, references, or regulators in advanced CMOS/FinFET nodes.
  • Strong understanding of physical-layer design principles, signal integrity, and high-speed I/O.
  • Proficiency with industry-standard design and simulation tools (e.g., Cadence Virtuoso, Spectre) and solid layout/parasitic-aware design skills.
Preferred Qualifications
  • Experience taking multiple analog/mixed-signal designs through full production tape-out and high-volume manufacturing.
  • Expertise in high-speed serial link design (PCIe, Ethernet, UALink, UCIe) and associated PHY architectures.
  • Familiarity with silicon debug, ATE test development, and design-for-test techniques.
  • Experience mentoring engineers and leading technical design reviews.
  • Excellent communication skills and a collaborative, ownership-driven mindset.

Salary range is $207,000 to $230,000 depending on experience, level, and business need. This role may be eligible for discretionary bonus, incentives and benefits.
We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

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