As a Director of AI/ML driven ASIC Design and Implementation Automation in our AI & Chip Engineering (ACE) organization, you will work in a dynamic environment to explore methodology, flows and tools ...
As a Director of AI/ML driven ASIC Design and Implementation Automation in our AI & Chip Engineering (ACE) organization, you will work in a dynamic environment to explore methodology, flows and tools ...
As a Director of AI/ML driven ASIC Design and Implementation Automation in our AI & Chip Engineering (ACE) organization, you will work in a dynamic environment to explore methodology, flows and tools ...
As a Director of AI/ML driven ASIC Design and Implementation Automation in our AI & Chip Engineering (ACE) organization, you will work in a dynamic environment to explore methodology, flows and tools ...
Required: • 3+ years of professional experience, including at least 2 years at an AI chip company (e.g. NVIDIA, Cerebras, SambaNova, Groq or similar) • Strong analytical and critical thinking ...
Required: • 3+ years of professional experience, including at least 2 years at an AI chip company (e.g. NVIDIA, Cerebras, SambaNova, Groq or similar) • Strong analytical and critical thinking ...
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Quick apply
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Ai Chip information
What is an AI chip?
What are some common challenges faced by professionals working in AI chip development, and how can they be addressed?
What are the key skills and qualifications needed to thrive as an AI chip engineer, and why are they important?
What is the difference between Ai Chip vs AI Hardware Engineer?
| Aspect | Ai Chip | AI Hardware Engineer |
|---|---|---|
| Required Credentials | Bachelor's or higher in Electrical Engineering, Computer Engineering, or related fields; knowledge of VLSI design | Bachelor's or higher in Electrical Engineering, Computer Engineering, or related fields; experience with hardware design and testing |
| Work Environment | Design labs, manufacturing facilities, R&D centers | Design labs, testing facilities, R&D centers |
| Employer & Industry Usage | Tech companies, semiconductor firms, AI hardware startups | Tech companies, semiconductor companies, research institutions |
While both roles involve hardware and AI technology, an Ai Chip focuses on designing and developing AI-specific chips, whereas an AI Hardware Engineer works on the broader hardware systems that support AI applications, including integration and testing.
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Full-time
Posted 13 days ago
Job description
As a Director of AI/ML driven ASIC Design and Implementation Automation in our AI & Chip Engineering (ACE) organization, you will work in a dynamic environment to explore methodology, flows and tools to improve efficiency and quality of results (power, performance, area, and quality) for SoC and IP development teams across the organization. You'll be working and connecting with AI/ML and automation experts in the industry as well as academia to explore state-of-the-art AI/ML CAD techniques as a part of VLSI CAD SW, prescribe key methods and requirements for tools & features to leverage for ASIC design.
In this role, you will develop prototype solutions to evaluate various state-of-the-art AI/ML techniques to identify the best solutions for NXP designs. While exploring these new ways of working, successful candidates will be working on actual designs and implementation to pilot and develop the automation.
This opportunity is within ACE Design Methodologies and Automation organization to enable Digital Transformation to leverage state-of-the-art AI/ML ideas to improve NXP designs for the Automotive Processors and Advanced microcontrollers in NXP.
The right candidate will be working in a fast-paced engineering environment, on a leading-edge advanced node technologies enabling automated building of exciting and complex SoCs.
Job Summary:
Explore research ideas and solutions that bring AI/ML applications to VLSI design
Work closely with Academic research communities in AI/ML for VLSI design, Architecture teams, IP and SoC designers and SoC Implementation teams from multiple sites to explore and evaluate for leading edge SoC technologies serving multiple industries
These automation applications include use of GenAI, Reinforcement Learning, Graph Neural Networks, and convolutional Networks
Strong AI/ML expertise, software and CAD background required
Cross functional aspects:
In this role, the candidate will work with multiple NXP Engineering teams, including Architecture, IP & SoC design, verification and implementation functions, coordinate and drive groundbreaking initiatives for Digital Transformation.
Qualifications:
BS or MS in Computer Science, Electrical Engineering, Computer Engineering or related disciplines with strong background in SW development
Hands-on expertise in programming using Python/C++
7+ years of experience in AI and ML techniques (LLMs, CNN, RNN, and GraphNN) with experience of application to real world optimization problems
Data structures, algorithms, and SW development for optimization problems
Hands on experience in Unix/Linux, revision control (Git, BitBucket), SW development and debug tools
Excellent analytical problem-solving skills
Strong verbal and written communication skills
Desirable skills/experience:
Strong understanding of design, layout, constraints (SDC, Clocks, CDC, RDC), Static timing analysis, Low-power, and Power-aware flows (UPF)
Prior experience in VLSI CAD methodology and tool development
Good understanding of HDL: System Verilog, Verilog, VHDL, front-end design, physical design and layout implementation/generation flows and tools
Understanding or prior experience with EDA tools for design, verification, DFT and implementation
Experience with Design revision control (GIT, DesignSync) and Make
Splunk, Jenkins, LSF and CI/CD process
Job location:
San Diego, CA
More information about NXP in the United States...
NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.
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