Agentrys Studio combines AI agents, engineering knowledge, agent-native tools, advanced models, and continuous learning to automate complex chip-design workflows. Our team brings deep experience in ...
Agentrys Studio combines AI agents, engineering knowledge, agent-native tools, advanced models, and continuous learning to automate complex chip-design workflows. Our team brings deep experience in ...
Agentrys Studio combines AI agents, engineering knowledge, agent-native tools, advanced models, and continuous learning to automate complex chip-design workflows. Our team brings deep experience in ...
Agentrys Studio combines AI agents, engineering knowledge, agent-native tools, advanced models, and continuous learning to automate complex chip-design workflows. Our team brings deep experience in ...
Integrate ML models into existing chip design software infrastructure * Write comprehensive tests and documentation * Collaborate with engineers to understand model requirements and deployment needs
Integrate ML models into existing chip design software infrastructure * Write comprehensive tests and documentation * Collaborate with engineers to understand model requirements and deployment needs
Physical Design Intern - CPU/AI Hardware
Austin, TX · On-site
$50/hr
This role is onsite, based out of Austin, TX or Santa Clara, CA. Who You Are * Currently pursuing a ... Industry-standard tools and techniques for modern chip development * How top-tier silicon teams ...
Physical Design Intern - CPU/AI Hardware
Austin, TX · On-site
$50/hr
This role is onsite, based out of Austin, TX or Santa Clara, CA. Who You Are * Currently pursuing a ... Industry-standard tools and techniques for modern chip development * How top-tier silicon teams ...
Analog Design Intern
Austin, TX · On-site
$22.50 - $42/hr
... EV, AI Data Centers, Industrial Control, Industrial Power and Infrastructure applications. The ... chip level verification and/or lab validation. Responsibilities will also include producing ...
Analog Design Intern
Austin, TX · On-site
$22.50 - $42/hr
... EV, AI Data Centers, Industrial Control, Industrial Power and Infrastructure applications. The ... chip level verification and/or lab validation. Responsibilities will also include producing ...
Its product combines AI agents, engineering knowledge, agent-native tools, advanced models, and continuous learning to automate complex chip-design workflows. Our team brings deep experience in ...
Quick apply
Its product combines AI agents, engineering knowledge, agent-native tools, advanced models, and continuous learning to automate complex chip-design workflows. Our team brings deep experience in ...
Analog Design Intern
Austin, TX · On-site
$26 - $47.50/hr
... EV, AI Data Centers, Industrial Control, Industrial Power and Infrastructure applications. The ... chip level verification and/or lab validation. Responsibilities will also include producing ...
Analog Design Intern
Austin, TX · On-site
$26 - $47.50/hr
... EV, AI Data Centers, Industrial Control, Industrial Power and Infrastructure applications. The ... chip level verification and/or lab validation. Responsibilities will also include producing ...
$22.50 - $42/hr
... EV, AI Data Centers, Industrial Control, Industrial Power and Infrastructure applications. The ... chip level verification and/or lab validation. Responsibilities will also include producing ...
$22.50 - $42/hr
... EV, AI Data Centers, Industrial Control, Industrial Power and Infrastructure applications. The ... chip level verification and/or lab validation. Responsibilities will also include producing ...
Analog Design Intern
$22.50 - $42/hr
... EV, AI Data Centers, Industrial Control, Industrial Power and Infrastructure applications. The ... chip level verification and/or lab validation. Responsibilities will also include producing ...
Analog Design Intern
$22.50 - $42/hr
... EV, AI Data Centers, Industrial Control, Industrial Power and Infrastructure applications. The ... chip level verification and/or lab validation. Responsibilities will also include producing ...
Analog Design Intern
Austin, TX · On-site
$22.50 - $42/hr
... EV, AI Data Centers, Industrial Control, Industrial Power and Infrastructure applications. The ... chip level verification and/or lab validation. Responsibilities will also include producing ...
Analog Design Intern
Austin, TX · On-site
$22.50 - $42/hr
... EV, AI Data Centers, Industrial Control, Industrial Power and Infrastructure applications. The ... chip level verification and/or lab validation. Responsibilities will also include producing ...
Infrastructure Engineer, AI for Chip Design
Bellevue, WA · On-site
$120K - $158K/yr
Infrastructure Engineer, AI for Chip Design Full-time · On-site · San Jose, CA · Austin, TX or Taiwan About the Role Our client seeks an Infrastructure Engineer to design and operate the platform ...
Quick apply
Infrastructure Engineer, AI for Chip Design
Bellevue, WA · On-site
$120K - $158K/yr
Infrastructure Engineer, AI for Chip Design Full-time · On-site · San Jose, CA · Austin, TX or Taiwan About the Role Our client seeks an Infrastructure Engineer to design and operate the platform ...
Architectural Design Intern
$15 - $17/hr
PAY RANGE: $15.00-$17.00/hour, based upon experience THE COMPANY: Intrinsic Development is a full ... ARCHITECTURAL DESIGN INTERN POSITION; We are seeking a creative, passionate and energetic intern ...
Quick apply
Architectural Design Intern
$15 - $17/hr
PAY RANGE: $15.00-$17.00/hour, based upon experience THE COMPANY: Intrinsic Development is a full ... ARCHITECTURAL DESIGN INTERN POSITION; We are seeking a creative, passionate and energetic intern ...
Architectural Design Intern
Lees Summit, MO · On-site
$15 - $17/hr
PAY RANGE: $15.00-$17.00/hour, based upon experience THE COMPANY: Intrinsic Development is a full ... ARCHITECTURAL DESIGN INTERN POSITION; We are seeking a creative, passionate and energetic intern ...
Architectural Design Intern
Lees Summit, MO · On-site
$15 - $17/hr
PAY RANGE: $15.00-$17.00/hour, based upon experience THE COMPANY: Intrinsic Development is a full ... ARCHITECTURAL DESIGN INTERN POSITION; We are seeking a creative, passionate and energetic intern ...
Our goal is to reimagine chip design using AI, cut down ASIC design time and cost, and enable a new ... What You'll Do As a Research Intern at Architect, you will spend 3 months working alongside the ...
Our goal is to reimagine chip design using AI, cut down ASIC design time and cost, and enable a new ... What You'll Do As a Research Intern at Architect, you will spend 3 months working alongside the ...
Our goal is to reimagine chip design using AI, cut down ASIC design time and cost, and enable a new ... What You'll Do As a Research Intern at Architect, you will spend 3 months working alongside the ...
Our goal is to reimagine chip design using AI, cut down ASIC design time and cost, and enable a new ... What You'll Do As a Research Intern at Architect, you will spend 3 months working alongside the ...
Architectural Design Intern
Lees Summit, MO · On-site
$15 - $17/hr
PAY RANGE: $15.00-$17.00/hour, based upon experience THE COMPANY: Intrinsic Development is a full ... ARCHITECTURAL DESIGN INTERN POSITION; We are seeking a creative, passionate and energetic intern ...
Architectural Design Intern
Lees Summit, MO · On-site
$15 - $17/hr
PAY RANGE: $15.00-$17.00/hour, based upon experience THE COMPANY: Intrinsic Development is a full ... ARCHITECTURAL DESIGN INTERN POSITION; We are seeking a creative, passionate and energetic intern ...
AI/ML ASIC Design and Implementation Automation Intern - Summer 2027
San Diego, CA · On-site
$64K - $107K/yr
As an "AI/ML ASIC Design and Implementation Automation Intern" in our Advanced Chip Engineering ... vary based on a number of factors such as qualifications, skill level, work location, and other ...
AI/ML ASIC Design and Implementation Automation Intern - Summer 2027
San Diego, CA · On-site
$64K - $107K/yr
As an "AI/ML ASIC Design and Implementation Automation Intern" in our Advanced Chip Engineering ... vary based on a number of factors such as qualifications, skill level, work location, and other ...
Graphic Design Intern
New Brunswick, NJ · On-site
$15.92/hr
The Graphic Design Intern will be introduced to and learn the Rutgers' brand, visual identity and ... Select colors, images, text style, and layouts based on Rutgers visual guidelines * Incorporate ...
Graphic Design Intern
New Brunswick, NJ · On-site
$15.92/hr
The Graphic Design Intern will be introduced to and learn the Rutgers' brand, visual identity and ... Select colors, images, text style, and layouts based on Rutgers visual guidelines * Incorporate ...
Graphic Design Intern
New Brunswick, NJ · On-site
$15.92/hr
The Graphic Design Intern will be introduced to and learn the Rutgers' brand, visual identity and ... Select colors, images, text style, and layouts based on Rutgers visual guidelines * Incorporate ...
Graphic Design Intern
New Brunswick, NJ · On-site
$15.92/hr
The Graphic Design Intern will be introduced to and learn the Rutgers' brand, visual identity and ... Select colors, images, text style, and layouts based on Rutgers visual guidelines * Incorporate ...
... based test patterns for hardware validation of test chip experiments. * Develop and maintain ... Use of AI tools without prior instruction from the interviewer will result in disqualification from ...
... based test patterns for hardware validation of test chip experiments. * Develop and maintain ... Use of AI tools without prior instruction from the interviewer will result in disqualification from ...
Ai Based Chip Design Intern information
See salary details
$9.13 - $11.65
9% of jobs
$11.65 - $14.16
8% of jobs
$14.81 is the 25th percentile. Wages below this are outliers.
$14.16 - $16.67
28% of jobs
The median wage is $17.34 / hr.
$16.67 - $19.19
16% of jobs
$20.91 is the 75th percentile. Wages above this are outliers.
$19.19 - $21.70
20% of jobs
$21.70 - $24.21
9% of jobs
$24.21 - $26.73
4% of jobs
$26.73 - $29.24
1% of jobs
$29.24 - $31.75
1% of jobs
$31.75 - $34.27
1% of jobs
$34.27 - $36.78
2% of jobs
$9
$19
$36
How much do ai based chip design intern jobs pay per hour?
What is an AI based chip design intern?
What types of projects and daily tasks can an AI based chip design intern expect to work on?
What are the key skills and qualifications needed to thrive as an AI based chip design intern, and why are they important?
What cities are hiring for Ai Based Chip Design Intern jobs?
Cities with the most Ai Based Chip Design Intern job openings:
What states have the most Ai Based Chip Design Intern jobs?
States with the most job openings for Ai Based Chip Design Intern jobs include:
What are popular job titles related to Ai Based Chip Design Intern jobs?
For Ai Based Chip Design Intern jobs, the most frequently searched job titles are:

Research Engineer, AI for Chip Design
On-site
Other
Posted 10 days ago
Job description
Agentrys is building the next generation of design automation for the semiconductor industry.
Our mission is to enable every engineering organization to build its own self-improving agentic design workforce. Agentrys Studio combines AI agents, engineering knowledge, agent-native tools, advanced models, and continuous learning to automate complex chip-design workflows.
Our team brings deep experience in artificial intelligence, electronic design automation, semiconductor design, GPU-accelerated computing, and production software systems. We work closely with leading semiconductor companies to turn advanced research into technology that improves engineering productivity, design quality, and time to market.
The RoleWe are looking for an exceptional Research Engineer to develop new technologies at the intersection of artificial intelligence, agentic systems, GPU-accelerated computing, and Electronic Design Automation.
You will identify important research problems, develop novel algorithms and agent-native tools, build working prototypes, and help deploy them in real semiconductor design environments. Your work may span AI agents, large language models, reinforcement learning, optimization, GPU-accelerated algorithms, verification, analog design, and other areas of chip design automation.
This role is ideal for someone who combines strong research ability with exceptional implementation skills and wants to see their ideas used in production—not remain only in papers or prototypes.
What You'll Do- Develop new AI and agentic methods for semiconductor design and verification.
- Build novel agent-native tools and algorithms designed specifically for autonomous engineering workflows, rather than adapting interfaces built primarily for human users.
- Develop GPU-accelerated algorithms for computationally intensive design, analysis, search, simulation, and optimization problems.
- Create tools that expose design state, constraints, actions, feedback, and optimization objectives in forms that agents can reason over and use effectively.
- Build agents that can understand engineering objectives, use EDA tools, execute multi-step workflows, analyze results, recover from failures, and improve over time.
- Research and implement techniques involving large language models, reinforcement learning, parallel algorithms, search, optimization, program synthesis, and machine learning for engineering systems.
- Develop solutions for workflows such as functional verification, analog and custom design, RTL development, synthesis, timing analysis, and physical design.
- Design rigorous evaluation methods for engineering agents, including problems where design data is private, sparse, or customer-specific.
- Translate promising research ideas into reliable, scalable product capabilities.
- Integrate AI systems with simulators, formal tools, design databases, commercial EDA tools, GPU computing platforms, and customer engineering infrastructure.
- Work directly with semiconductor engineers to understand complex workflows and identify high-impact automation opportunities.
- Collaborate with research, product, platform, and solutions teams across San Jose, Austin, and Taiwan.
- Contribute to patents, publications, technical presentations, and the broader development of Agentic Design Automation.
- PhD or master's degree in Computer Science, Electrical Engineering, Computer Engineering, or a related field, or equivalent practical experience.
- Strong programming skills in Python and proficiency in at least one systems language such as C++ or Rust.
- Experience with machine learning frameworks such as PyTorch or JAX.
- Demonstrated research or engineering experience in one or more of the following:
- Electronic Design Automation
- Semiconductor design or verification
- Agentic AI or large language models
- GPU-accelerated or parallel algorithms
- Reinforcement learning
- Combinatorial optimization
- Program synthesis or code generation
- Formal methods
- Machine learning for engineering or scientific applications
- Ability to take an ambiguous technical problem from initial formulation through experimentation, implementation, and evaluation.
- Strong analytical, software engineering, optimization, and debugging skills.
- High ownership, intellectual curiosity, and willingness to work across research and product boundaries.
- Clear written and verbal communication skills.
- Publications in leading EDA, AI, machine learning, systems, high-performance computing, or computer architecture venues.
- Experience developing new EDA algorithms, optimization engines, design representations, or domain-specific tools.
- Experience developing GPU-accelerated algorithms using CUDA, Triton, or related parallel-computing technologies.
- Experience profiling and optimizing computational workloads across CPUs and GPUs.
- Experience designing tools or environments for use by autonomous agents.
- Experience with simulation, verification, synthesis, timing analysis, physical design, analog design, or layout.
- Experience building agents that interact with tools, codebases, databases, or external environments.
- Experience with LLM training, post-training, fine-tuning, retrieval, tool use, or evaluation.
- Familiarity with Verilog, SystemVerilog, assertions, SPICE, TCL, or semiconductor design flows.
- Experience with commercial EDA tools or production chip-design environments.
- Experience deploying AI systems in enterprise or security-sensitive environments.
- A strong record of implementation through research systems, open-source projects, production software, or technical competitions.
At Agentrys, you will have the opportunity to:
- Help define a new category of semiconductor design technology.
- Invent the agent-native algorithms and tools that will form the foundation of future automated design workflows.
- Develop GPU-accelerated algorithms that make previously impractical design and optimization workflows possible.
- Build AI systems that perform complex, consequential engineering work—not just generate recommendations.
- Work with real semiconductor workflows, tools, and private engineering knowledge.
- See your research deployed directly with leading chip-design organizations.
- Work in a small, highly technical team where individual contributions can shape the product and company.
- Collaborate with colleagues across San Jose, Austin, and Taiwan.
- Change how chips are designed, rather than focus on only one design or one point tool.
Agentrys is an equal opportunity employer. We welcome candidates from diverse backgrounds who are excited to combine ambitious research with meaningful engineering impact.
#J-18808-Ljbffr