Architect Labs in Palo Alto is looking for a Research Intern to assist the founding team in advancing AI models for chip design. This 3-month role involves conducting experiments that influence the ...
Architect Labs in Palo Alto is looking for a Research Intern to assist the founding team in advancing AI models for chip design. This 3-month role involves conducting experiments that influence the ...
Chip Design Engineer
Palo Alto, CA · On-site
We are reinventing chip development and closing the loop between AI and the hardware that fuels it ... AI-driven design-space optimization in DTCO, ML-based PPA improvement, and LLM agents for run ...
Chip Design Engineer
Palo Alto, CA · On-site
We are reinventing chip development and closing the loop between AI and the hardware that fuels it ... AI-driven design-space optimization in DTCO, ML-based PPA improvement, and LLM agents for run ...
Chip Design Engineer
San Francisco, CA · On-site
You will help shape how AI and human expertise work together in chip design. Your designs will go ... You can make informed design decisions based on PPA goals. * Collaborative Mindset : You work well ...
Chip Design Engineer
San Francisco, CA · On-site
You will help shape how AI and human expertise work together in chip design. Your designs will go ... You can make informed design decisions based on PPA goals. * Collaborative Mindset : You work well ...
Role Description This is a full-time, on-site position for a Solutions Engineer, AI for Chip Design based in San Jose, CA or Hsinchu, Taiwan. In this role, you will: * Deploy agentic AI systems into ...
Role Description This is a full-time, on-site position for a Solutions Engineer, AI for Chip Design based in San Jose, CA or Hsinchu, Taiwan. In this role, you will: * Deploy agentic AI systems into ...
Role Description This is a full-time, on-site position for a Solutions Engineer, AI for Chip Design based in San Jose, CA or Hsinchu, Taiwan. In this role, you will: * Deploy agentic AI systems into ...
Role Description This is a full-time, on-site position for a Solutions Engineer, AI for Chip Design based in San Jose, CA or Hsinchu, Taiwan. In this role, you will: * Deploy agentic AI systems into ...
The first is hardware-focused: applying ML and AI techniques directly to chip design challenges ... Design, implement, and evaluate LLM-based tools and agentic workflows - including systems built on ...
New
The first is hardware-focused: applying ML and AI techniques directly to chip design challenges ... Design, implement, and evaluate LLM-based tools and agentic workflows - including systems built on ...
New
The first is hardware-focused: applying ML and AI techniques directly to chip design challenges ... Design, implement, and evaluate LLM-based tools and agentic workflows - including systems built on ...
New
The first is hardware-focused: applying ML and AI techniques directly to chip design challenges ... Design, implement, and evaluate LLM-based tools and agentic workflows - including systems built on ...
New
The first is hardware-focused: applying ML and AI techniques directly to chip design challenges ... Design, implement, and evaluate LLM-based tools and agentic workflows - including systems built on ...
New
The first is hardware-focused: applying ML and AI techniques directly to chip design challenges ... Design, implement, and evaluate LLM-based tools and agentic workflows - including systems built on ...
New
The first is hardware-focused: applying ML and AI techniques directly to chip design challenges ... Design, implement, and evaluate LLM-based tools and agentic workflows - including systems built on ...
New
The first is hardware-focused: applying ML and AI techniques directly to chip design challenges ... Design, implement, and evaluate LLM-based tools and agentic workflows - including systems built on ...
New
The first is hardware-focused: applying ML and AI techniques directly to chip design challenges ... Design, implement, and evaluate LLM-based tools and agentic workflows - including systems built on ...
New
The first is hardware-focused: applying ML and AI techniques directly to chip design challenges ... Design, implement, and evaluate LLM-based tools and agentic workflows - including systems built on ...
New
The first is hardware-focused: applying ML and AI techniques directly to chip design challenges ... Design, implement, and evaluate LLM-based tools and agentic workflows - including systems built on ...
New
The first is hardware-focused: applying ML and AI techniques directly to chip design challenges ... Design, implement, and evaluate LLM-based tools and agentic workflows - including systems built on ...
New
The first is hardware-focused: applying ML and AI techniques directly to chip design challenges ... Design, implement, and evaluate LLM-based tools and agentic workflows - including systems built on ...
New
The first is hardware-focused: applying ML and AI techniques directly to chip design challenges ... Design, implement, and evaluate LLM-based tools and agentic workflows - including systems built on ...
New
The first is hardware-focused: applying ML and AI techniques directly to chip design challenges ... Design, implement, and evaluate LLM-based tools and agentic workflows - including systems built on ...
The first is hardware-focused: applying ML and AI techniques directly to chip design challenges ... Design, implement, and evaluate LLM-based tools and agentic workflows - including systems built on ...
The first is hardware-focused: applying ML and AI techniques directly to chip design challenges ... Design, implement, and evaluate LLM-based tools and agentic workflows - including systems built on ...
New
The first is hardware-focused: applying ML and AI techniques directly to chip design challenges ... Design, implement, and evaluate LLM-based tools and agentic workflows - including systems built on ...
New
ASIC Chip Design Lead
Saratoga, CA · On-site
$250K - $280K/yr
... based hardware startup pioneering infrastructure solutions that accelerate AI data centers to ... Position Overview We are seeking a hands-on ASIC Chip Design Lead to own chip design execution from ...
ASIC Chip Design Lead
Saratoga, CA · On-site
$250K - $280K/yr
... based hardware startup pioneering infrastructure solutions that accelerate AI data centers to ... Position Overview We are seeking a hands-on ASIC Chip Design Lead to own chip design execution from ...
The first is hardware-focused: applying ML and AI techniques directly to chip design challenges ... Design, implement, and evaluate LLM-based tools and agentic workflows - including systems built on ...
New
The first is hardware-focused: applying ML and AI techniques directly to chip design challenges ... Design, implement, and evaluate LLM-based tools and agentic workflows - including systems built on ...
New
The first is hardware-focused: applying ML and AI techniques directly to chip design challenges ... Design, implement, and evaluate LLM-based tools and agentic workflows - including systems built on ...
New
The first is hardware-focused: applying ML and AI techniques directly to chip design challenges ... Design, implement, and evaluate LLM-based tools and agentic workflows - including systems built on ...
New
The first is hardware-focused: applying ML and AI techniques directly to chip design challenges ... Design, implement, and evaluate LLM-based tools and agentic workflows - including systems built on ...
New
The first is hardware-focused: applying ML and AI techniques directly to chip design challenges ... Design, implement, and evaluate LLM-based tools and agentic workflows - including systems built on ...
New
The first is hardware-focused: applying ML and AI techniques directly to chip design challenges ... Design, implement, and evaluate LLM-based tools and agentic workflows - including systems built on ...
New
The first is hardware-focused: applying ML and AI techniques directly to chip design challenges ... Design, implement, and evaluate LLM-based tools and agentic workflows - including systems built on ...
New
The first is hardware-focused: applying ML and AI techniques directly to chip design challenges ... Design, implement, and evaluate LLM-based tools and agentic workflows - including systems built on ...
New
The first is hardware-focused: applying ML and AI techniques directly to chip design challenges ... Design, implement, and evaluate LLM-based tools and agentic workflows - including systems built on ...
New
Ai Based Chip Design Intern information
See salary details
$9.13 - $11.65
9% of jobs
$11.65 - $14.16
8% of jobs
$14.81 is the 25th percentile. Wages below this are outliers.
$14.16 - $16.67
28% of jobs
The median wage is $17.34 / hr.
$16.67 - $19.19
16% of jobs
$20.91 is the 75th percentile. Wages above this are outliers.
$19.19 - $21.70
20% of jobs
$21.70 - $24.21
9% of jobs
$24.21 - $26.73
4% of jobs
$26.73 - $29.24
1% of jobs
$29.24 - $31.75
1% of jobs
$31.75 - $34.27
1% of jobs
$34.27 - $36.78
2% of jobs
$9
$19
$36
How much do ai based chip design intern jobs pay per hour?
As of Sep 14, 2026, the average hourly pay for ai based chip design intern in the United States is $19.38, according to ZipRecruiter salary data. Most workers in this role earn between $14.42 and $21.63 per hour, depending on experience, location, and employer.
What is an AI based chip design intern?
AI Based Chip Design Interns are students or early-career professionals who assist in the development of semiconductor chips that utilize artificial intelligence technologies. They typically work under the guidance of engineers to help design, test, and optimize chips for AI applications such as machine learning, deep learning, or neural networks. Their responsibilities can include running simulations, analyzing data, and supporting the hardware-software integration process. This internship provides hands-on experience in chip design, exposure to current industry tools, and insights into the rapidly evolving AI hardware field.
What types of projects and daily tasks can an AI based chip design intern expect to work on?
As an AI-Based Chip Design Intern, you can expect to work on projects that involve modeling, simulating, and optimizing integrated circuits using AI-driven methodologies. Typical daily tasks may include assisting in developing and testing machine learning algorithms for hardware design automation, analyzing data from chip simulations, and collaborating closely with senior engineers to improve chip performance or power efficiency. You’ll likely get hands-on experience with industry-standard tools such as Python, TensorFlow, and EDA software, while participating in team meetings to discuss design challenges and solutions.
What are the key skills and qualifications needed to thrive as an AI based chip design intern, and why are they important?
To thrive as an AI Based Chip Design Intern, you need a solid understanding of digital circuit design, computer architecture, and a background in electrical engineering or computer science. Familiarity with hardware description languages (such as Verilog or VHDL), AI frameworks (like TensorFlow or PyTorch), and electronic design automation (EDA) tools is typically required. Strong analytical thinking, problem-solving abilities, and effective communication skills help interns collaborate and innovate within multidisciplinary teams. These skills and qualities are crucial for successfully contributing to the development of advanced, efficient AI hardware solutions.
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Cities with the most Ai Based Chip Design Intern job openings:
What states have the most Ai Based Chip Design Intern jobs?
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What are popular job titles related to Ai Based Chip Design Intern jobs?
For Ai Based Chip Design Intern jobs, the most frequently searched job titles are:
AI Research Intern: Hardware Design & ML
Palo Alto, CA • On-site
Architect Labs
Other
Posted 12 days ago
Job description
Architect Labs in Palo Alto is looking for a Research Intern to assist the founding team in advancing AI models for chip design. This 3-month role involves conducting experiments that influence the company’s core modeling roadmap. Candidates should be pursuing a relevant graduate degree, have a solid understanding of Reinforcement Learning, and be proficient in Python and deep learning frameworks.
Interns can expect competitive stipends and mentorship from an expert team. The internship provides a unique opportunity to work on groundbreaking AI-driven projects in the domain of chip design.
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