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53 Encore Semi Senior Asic Design Engineer Jobs Hiring Near You

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What are the key skills and qualifications needed to thrive as a Senior ASIC Design Engineer, and why are they important?

To thrive as a Senior ASIC Design Engineer, you need deep expertise in digital and/or analog circuit design, strong knowledge of hardware description languages (HDLs) like Verilog or VHDL, and a relevant engineering degree. Familiarity with EDA tools such as Synopsys, Cadence, and Mentor Graphics, as well as experience with simulation, synthesis, and verification methodologies, is typically required. Outstanding problem-solving, collaboration, and communication skills set top performers apart in this role. These competencies ensure efficient design cycles, robust chip functionality, and successful delivery of complex semiconductor projects.

What are some common challenges Senior ASIC Design Engineers face when collaborating with cross-functional teams?

Senior ASIC Design Engineers often work closely with verification, software, and systems teams throughout the development cycle. One common challenge is ensuring clear communication of design specifications and changes, as misunderstandings can lead to integration issues or delays. Balancing multiple project timelines and adapting to evolving requirements from other departments can also be demanding. Building strong, collaborative relationships and using robust documentation and project management tools are key to overcoming these challenges.

What does a Senior ASIC Design Engineer do?

A Senior ASIC Design Engineer is responsible for designing and developing Application-Specific Integrated Circuits (ASICs) used in a wide range of electronic devices. They lead the architecture, implementation, and verification of complex digital or mixed-signal circuits, often collaborating with cross-functional teams. This senior role involves optimizing designs for performance, power, and area while ensuring that the final product meets stringent technical and quality requirements. Additionally, they may mentor junior engineers and contribute to design methodologies and best practices within the organization.

What is the difference between Senior Asic Design Engineer vs Digital IC Design Engineer?

AspectSenior Asic Design EngineerDigital IC Design Engineer
Required CredentialsBachelor's/Master's in Electrical Engineering, VLSI, or related fields; experience in ASIC designBachelor's/Master's in Electrical Engineering, VLSI, or related fields; focus on digital circuit design
Work EnvironmentDesign teams in semiconductor or tech companies, hardware development labsIntegrated circuit design teams, research labs, semiconductor companies
Employer & Industry UsageUsed in ASIC development, FPGA design, hardware accelerationUsed in digital chip design, FPGA development, digital system integration

The main difference is that a Senior Asic Design Engineer specializes in designing application-specific integrated circuits, often leading complex projects, while a Digital IC Design Engineer focuses on digital circuit design within integrated circuits. Both roles require similar educational backgrounds and work environments but differ in project scope and specialization.

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Infographic showing various Senior Asic Design Engineer job openings at Encore Semi in the United States as of May 2026, with employment types broken down into 100% Full Time. Highlights an 13% Physical, and 87% Remote job distribution.
Sr Design Verification Engineer (Austin TX - Onsite)

Sr Design Verification Engineer (Austin TX - Onsite)

Encore Semi, Inc.

Austin, TX • Hybrid

$150K - $165K/yr

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Posted yesterday

Job description

Sr Design Verification Engineer (Remote)
Full-time: Salary + Benefits + Bonuses / Contractor
Work Status:  US citizen or Lawful Permanent Resident.
Location: Austin TX
Digital ASIC Verification Engineer
We are looking for an experienced Digital ASIC Verification Engineer to verify complex digital systems, including ARM-based CPUs and DSP blocks. You will own the full verification lifecycle, from test planning to coverage closure using SystemVerilog and UVM.
Responsibilities
  • Develop UVM/SystemVerilog testbenches for block and system-level verification
  • Create and execute test plans; drive functional and code coverage closure
  • Automate test generation and regressions using Python and MATLAB
  • Support pre-silicon verification and post-silicon bring-up
  • Collaborate across teams to ensure design quality and integrity

Qualifications
  • 10+ years of ASIC verification experience
  • Strong skills in SystemVerilog, UVM, and constrained random verification
  • Familiarity with ARM/CPU architecture and OOP concepts
  • Proficiency in Python scripting (MATLAB a plus)
  • Bachelors in EE/CS/CE (Master’s preferred)

The anticipated annual base salary for this position is between $150,000 to $165,000, which also includes a comprehensive benefits package.
Full-Time Benefits:
• 15 days of PTO per calendar year
• 10 paid Holidays per calendar year
• Comprehensive Medical Benefits: Company covers 80% of premiums for Employee and Dependents
• Dental & Vision: Company covers 50% of premiums for Employee and Dependents
• Voluntary Benefits: Life Insurance, FSA (Health and Dependent, Limited Purpose), HAS, and Gap Insurance
• Employee Assistant Program (EAP)
• 401k - Traditional & Roth
• Life/AD&D and Long-Term Disability
• Tuition reimbursement
Equal Opportunity Policy Statement
Encore Semi, Inc. is an Equal Opportunity Employer that does not discriminate on the basis of actual or perceived race, religion, creed, color, age, sex, sexual orientation, gender, gender identity or expression, national origin, genetics, ancestry, marital status, civil union status, medical condition, disability (mental and physical), military and veteran status, pregnancy, childbirth and related medical conditions, or any other characteristic protected by applicable federal, state, or local laws and ordinances.
Encore Semi is also committed to compliance with all fair employment practices regarding citizenship and immigration status.
LinkedIn :: https://www.linkedin.com/in/rtl2gds/