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60 Voltus Jobs Hiring Near You

DRC, LVS, antenna, ERC, and tapeout readiness using industry-standard tools (e.g., Innovus, ICC2, Calibre, Voltus, RedHawk). * Contribute to and improve physical design automation infrastructure ...

Principal Design Engineer

San Jose, CA · On-site

$180 - $240/hr

Experience with Cadence tools such as Innovus, Tempus, QRC, Voltus and Pegasus * Experience with advanced technologies like 5nm, 3ns and 2nm nodes * Experience using Linux servers * Script ...

Physical Design Engineer

Phoenix, AZ · On-site

$135K - $139K/yr

Exp. in Block-level & Full-chip floor-planning & power grid planning,w/Python, TCL,or Perl progr., working w/EDA tools like DC/Genus, ICC2/Innovus, Primetime,Redhawk/Voltus or Calibre Additional Job ...

Physical Design Engineer

Phoenix, AZ · On-site

$135K - $139K/yr

Exp. in Block-level & Full-chip floor-planning & power grid planning,w/Python, TCL,or Perl progr., working w/EDA tools like DC/Genus, ICC2/Innovus, Primetime,Redhawk/Voltus or Calibre Additional Job ...

Setup Voltus - Fi EMIR Flow - Implement and maintain Voltus-Fi based Electromigration and IR drop (EMIR) analysis flow. * Setup EMX Flow - Configure and deploy EMX electromagnetic simulation flow for ...

Physical Design Engineer

Phoenix, AZ · On-site

$135K - $139K/yr

Exp. in Block-level & Full-chip floor-planning & power grid planning,w/Python, TCL,or Perl progr., working w/EDA tools like DC/Genus, ICC2/Innovus, Primetime,Redhawk/Voltus or Calibre Additional Job ...

Physical Design Engineer

Phoenix, AZ · On-site

$135K - $139K/yr

Exp. in Block-level & Full-chip floor-planning & power grid planning,w/Python, TCL,or Perl progr., working w/EDA tools like DC/Genus, ICC2/Innovus, Primetime,Redhawk/Voltus or Calibre Additional Job ...

Contract Hardware Engineer Mid.

San Jose, CA · On-site

$236K/yr

Experience with Voltus, RedHawk, or similar power/IR integrity tools * Multi-Node Design: Translate and optimize designs across different process geometries, including transition strategies from ...

Voltus, Voltus-Fi, RedHawk-SC, Totem Experience with analysis, optimization, or debugging of IR/IVD/EM issues on high performance, large-scale designs and silicon Familiarity with advanced packaging ...

Voltus, Voltus-Fi, RedHawk-SC, Totem Experience with analysis, optimization, or debugging of IR/IVD/EM issues on high performance, large-scale designs and silicon Familiarity with advanced packaging ...

Voltus, Voltus-Fi, RedHawk-SC, Totem Hands-on experience with analysis, optimization, and debugging of IR/IVD/EM issues on high performance, large-scale designs and silicon Familiarity with advanced ...

Voltus, Voltus-Fi, RedHawk-SC, Totem Hands-on experience with analysis, optimization, and debugging of IR/IVD/EM issues on high performance, large-scale designs and silicon Familiarity with advanced ...

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Showing results 1-20

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Posted 28 days ago


Job description

Job Role: Power Analysis Engineer
Location: Sunnyvale CA or Austin TX

Full time

Job Description: Low Power Design Engineer — Reality Labs
Experience: 4+ years in VLSI / Semiconductor Design
About the Role
We are looking for a Low Power Design Engineer to join the Silicon SOC team at Reality Labs. The role focuses on power analysis, RTL power estimation, and power optimization for next-generation wearable and AR/VR SoC designs. You will work on power-critical flows that directly impact battery life and thermal performance of our products.
Mandatory Requirements
1. Power Analysis Tool Experience (MUST HAVE)
At least 1 year of most recent experience in one of the following:
Priority Tool Vendor
Preferred Synopsys PrimePower / PTPX Synopsys
Acceptable Ansys PowerArtist Ansys
Acceptable Cadence Voltus Cadence
⚠️ Candidates with PrimePower/PTPX experience will be given first priority.
2. RTL Power Estimation (MUST HAVE — at least one)
3. Power Replay Methodology
4. Minimum Experience
Priority Criteria
🟢 P1 — Interview immediately PrimePower/PTPX + PP-RTL/RTL-A + Power Replay (all three)
🟡 P2 — Strong consider PrimePower/PTPX + at least one of PP-RTL or Power Replay
🟠 P3 — Review carefully PowerArtist or Voltus (no PrimePower) + 5+ yrs low-power experience
🔴 P4 — Pass No power analysis tool experience, or only PD/STA/verification background
Perform gate-level and RTL-level power analysis using PrimePower/PTPX or equivalent tools
Hands on year of most recent experience must be on power analysis tools (PrimePower preferred)
4+ years total in VLSI / semiconductor low-power design
Experience with simulation or emulation-based power replay analysis
Cadence Joules (acceptable equivalent)
Synopsys PrimePower-RTL (PP-RTL) / RTL Architect (RTL-A) (preferred)