Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labsโ Intelligent Connectivity Platform integrates CXLยฎ, Ethernet, NVLink, PCIeยฎ, and UALinkโข semiconductor-based technologies with the companyโs COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-toโend scaleโup, and scaleโout connectivity. The companyโs custom connectivity solutions business complements its standardsโbased portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.
Astera Labs is at the epicenter of the AI infrastructure revolution, building the intelligent connectivity solutions that power the worldโs most advanced data centers. As AI workloads scale to unprecedented levels, the demand for purposeโbuilt, rackโscale platforms that seamlessly integrate highโspeed connectivity, firmware intelligence, and composable architectures has never been greater โ and neither has the opportunity to shape what comes next.
Role Overview
The AI Platform Solutions Group is seeking a Distinguished Engineer to serve as the technical visionary for nextโgeneration AI infrastructure, spanning server firmware, highโspeed connectivity, and rackโscale system design. In this role, you will define the endโtoโend architecture for AI platforms that integrate cuttingโedge technologies such as PCIe Gen5/6, composable rack architectures, and advanced interconnect solutions including Astera Labsโ portfolio of retimers, switches, and fabric controllers.
This is a highโimpact, highโvisibility role where you will drive innovation across silicon integration, platform firmware, system performance, and rackโlevel orchestration โ directly enabling hyperscale AI training and inference workloads. You will partner with silicon vendors, hyperscalers, OEMs, and ODMs while influencing industry standards and mentoring the next generation of platform architects. If you want to architect the future of AI infrastructure at a company that is defining the connectivity backbone of modern data centers, this is your role.
Key Responsibilities
- AI Platform & RackโScale Architecture
- Define the endโtoโend architecture for AI platforms, from nodeโlevel design to rackโscale composable systems
- Drive adoption of PCIeโbased fabrics for disaggregated compute, memory, and accelerator scalability
- Architect solutions for GPU/acceleratorโdense systems optimized for AI training and inference workloads
- Lead integration of connectivity solutions โ retimers, switches, and fabric controllers โ aligned with Astera Labsโ product ecosystem
- Firmware & Platform Leadership
- Drive innovation in server BIOS/UEFI architecture, OpenBMCโbased platform management, Redfish APIs for scalable infrastructure control, and lifecycle provisioning frameworks
- Lead system bringโup and ensure seamless firmwareโhardwareโsoftware integration across complex AI platforms
- Define the technical vision and multiโyear firmware roadmap for AI infrastructure platforms
- Performance & Optimization
- Own endโtoโend AI platform performance strategy including PCIe topology optimization, bandwidth scaling, latency reduction, and CPU performance tuning for AI orchestration workloads
- Drive memory performance optimization across DDR, NUMA, and emerging memory expansion technologies
- Lead performance tuning for multiโaccelerator systems (GPU/ASIC/FPGA), highโthroughput data pipelines, and distributed AI workloads
- Ecosystem & Industry Leadership
- Collaborate with silicon vendors (CPU, GPU, AI accelerators), connectivity ecosystem partners, OEMs, ODMs, and hyperscalers
- Influence industry standards across OpenBMC, Redfish, OCP, and related consortia
- Mentor senior engineers and grow deep technical bench strength across the organization
- Represent Astera Labs as a recognized thought leader in AI infrastructure and platform innovation
Basic Qualifications
- Bachelorโs degree in Computer Science, Electrical Engineering, Computer Engineering, or a related field
- 15+ years of experience in system architecture, server firmware, or platform engineering
- Deep expertise in server BIOS/UEFI, OpenBMC and BMC firmware stacks, and Redfish or datacenter management frameworks
- Strong knowledge of PCIe architecture and performance optimization (Gen4/5/6)
- Experience with CPU, memory, and systemโlevel performance tuning for highโperformance computing or AI platforms
- Strong programming experience in C/C++ and lowโlevel system software
- Proven track record of leading crossโfunctional, largeโscale architecture initiatives
Preferred Qualifications
- Masterโs degree or PhD in Computer Science, Electrical Engineering, or a related field
- Experience with rackโscale composable infrastructure and disaggregated architectures
- Background in AI training clusters, acceleratorโbased systems, or hyperscale datacenter design
- Expertise in highโspeed interconnect solutions such as retimers, switches, and fabric ICs
- Experience with platform lifecycle management systems and fleetโlevel automation
- Contributions to industry standards bodies or openโsource firmware ecosystems
- Demonstrated ability to define multiโyear technical roadmaps and influence executive strategy
We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.