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Weekend Power Automate Jobs in Austin, TX (NOW HIRING)

Design, build, validate, and automate RF test benches for full characterization of custom RF ... Ability to work extended hours and weekends as needed ITAR REQUIREMENTS: Learn more about the ITAR ...

Design, build, validate, and automate RF test benches for full characterization of custom RF ... Ability to work extended hours and weekends as needed ITAR REQUIREMENTS: Learn more about the ITAR ...

Design, build, validate, and automate RF test benches for full characterization of custom RF ... Ability to work extended hours and weekends as needed ITAR REQUIREMENTS: * To conform to U.S.

Operate and automate a variety of EMI, RF, and electronics test equipment * Independently perform ... Extended hours and weekend work may be required to support critical project and mission milestones

We lacked buildings, roads, water, power, communications, and waste management, and constructing ... You will improve and automate existing workflows, implement lightweight controls where they matter ...

Develop test scripts, automate processes, and analyze data using programming languages such as Perl ... Ability to work extended hours and weekends as needed to meet critical milestones ITAR REQUIREMENTS:

We lacked buildings, roads, water, power, communications, and waste management, and constructing ... You will improve and automate existing workflows, implement lightweight controls where they matter ...

Showing results 41-60

Weekend Power Automate information

See Austin, TX salary details

$55.5K

$116.7K

$177.9K

How much do weekend power automate jobs pay per year?

As of Aug 23, 2026, the average yearly pay for weekend power automate in Austin, TX is $116,667.00, according to ZipRecruiter salary data. Most workers in this role earn between $97,100.00 and $132,800.00 per year, depending on experience, location, and employer.

What is the difference between Weekend Power Automate vs Power Automate Developer?

AspectWeekend Power AutomatePower Automate Developer
CertificationsBasic Microsoft Power Platform certificationsAdvanced certifications like PL-400
Work EnvironmentPart-time, project-based, often freelance or freelance-likeFull-time, corporate or enterprise settings
Employer & Industry UsageSmall businesses, startups, or individuals automating personal tasksLarge organizations automating complex workflows
Search & Comparison IntentUnderstanding part-time automation rolesCareer development or job requirements in automation

Weekend Power Automate roles typically involve part-time, flexible automation tasks suitable for freelancers or hobbyists, often requiring basic certifications. Power Automate Developers work full-time in enterprise environments, handling complex automation projects with advanced skills and certifications. The main difference lies in scope, experience level, and work setting, with Weekend Power Automate focusing on simpler, flexible tasks and Power Automate Developers on comprehensive, enterprise-level solutions.

What cities near Austin, TX are hiring for Weekend Power Automate jobs?

Cities near Austin, TX with the most Weekend Power Automate job openings:

Infographic showing various Weekend Power Automate job openings in Austin, TX as of June 2026, with employment types broken down into 100% Full Time. Highlights an 100% In-person job distribution, with an average salary of $116,667 per year, or $56.1 per hour.

Sr. ASIC DFT Engineer (Silicon)

SpaceX

Austin, TX

Full-time

Re-posted 25 days ago


SpaceX rating

8.7

Company rating: 8.7 out of 10

Based on 149 frontline employees who took The Breakroom Quiz

17th of 72 rated aerospace companies


Job description

SR. ASIC DFT ENGINEER (SILICON ENGINEERING)

At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the world's largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system - thousands of satellites, consumer receivers that allow users to connect within minutes of unboxing, and the software that brings it all together. We've only begun to scratch the surface of Starlink's potential global impact and are looking for best-in-class engineers to help maximize Starlink's utility for communities and businesses around the globe. 

We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering and ASIC implementation). In this role, you will be developing next-generation ASICs for deployment in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously not been available, affordable or reliable. Your efforts will help deliver cutting-edge solutions that will expand the performance and capabilities of the Starlink network.   

RESPONSIBILITIES:

  • Implement and optimize DFT architectures, including scan insertion, compression/decompression logic, memory BIST, and logic BIST, leveraging Siemens Tessent tools
  • Integration and verification of Design for Test (DFT) IPs and fabrics within Subsystems
  • Set up and run Automatic Test Pattern Generation (ATPG) tools and methodologies, including generating patterns for stuck-at, transition, and path delay fault models, while focusing on pattern compression, diagnosis, and hierarchical test flows.
  • Run and debug non-timing and SDF annotated gate-level simulations
  • Create and validate DFT patterns for post-silicon bringup and also help with ATE debug through all cycles of silicon characterization
  • Develop test scripts, automate processes, and analyze data using programming languages such as Perl, Python, Tcl, or C++

BASIC QUALIFICATIONS:

  • Bachelor's degree in electrical engineering, computer engineering, or physics
  • 5+ years of experience in semiconductor Design For Test (DFT) engineering, post-silicon validation, and/or production testing

PREFERRED SKILLS AND EXPERIENCE:

  • Master's or PhD in electrical engineering, computer engineering, physics, or related engineering field
  • Extensive experience in post-silicon bringup, including silicon debug, failure analysis, and yield optimization on complex SoCs or ASICs
  • Hands-on experience with Automated Test Equipment (ATE) platforms (e.g., Teradyne, Advantest) for high-volume manufacturing test development and debug
  • Experience collaborating with cross-functional teams (e.g., design, verification, and manufacturing) to ensure DFT features meet production requirements, utilizing Siemens Tessent workflows
  • Knowledge of industry standards for testability (e.g., IEEE 1500, 1687) and experience with low-power DFT techniques using Siemens Tessent
  • Experience with In-System Test (IST), boundary scan (IEEE 1149.1), functional testing in embedded systems, or board-level diagnostics, preferably using Siemens Tessent tools
  • Hands-on experience with Tessent Streaming Scan Network
  • Experience with cell-aware fault models in ATPG
  • Excellent problem-solving skills, with the ability to analyze complex test failures and implement corrective actions
  • Strong communication skills for documenting test strategies, reporting results, and presenting to stakeholders
  • Ability to work in a fast-paced environment, handling multiple projects and adapting to evolving technology nodes (e.g., 7nm and below)

ADDITIONAL REQUIREMENTS:    

  • Ability to work extended hours and weekends as needed to meet critical milestones

What SpaceX employees say

Pay

Benefits

Hours and flexibility

Workplace

Get the full story on Breakroom


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About SpaceX

Sourced by ZipRecruiter

Industry

Aerospace product and parts manufacturing, data services, guided missile and space vehicle manufacturing and satellite telecommunications

Company size

1,001 - 5,000 Employees

Headquarters location

Hawthorne, CA, US