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Wafer Sort Test Jobs (NOW HIRING)

TechStaff, Inc

Product Engineer

Chandler, AZ

$140K - $150K/yr

Additionally, the group works with the Process and Device teams to develop a yield pareto correlating wafer sort and final test failure mechanisms to bit properties thus defining a path to yield ...

SPACE EXPLORATION TECHNOLOGIES CORP

$150 - $210/hr

Wafer sort, wafer probe, probe card design and test experience * Custom socket and wafer prober design and test experience * Semiconductor functional and parametric test design and developmentDigital ...

Techstaff

Product Engineer

Chandler, AZ

Additionally, the group works with the Process and Device teams to develop a yield pareto correlating wafer sort and final test failure mechanisms to bit properties thus defining a path to yield ...

Socket.dev

Principal Fab Test Engineer

Fort Collins, CO · On-site

$129 - $207/hr

... and wafer sort (100%) measurements. These tools are used to characterize and measure advanced ... As a WSD Fab Test Unit Process Engineer (TUPE), you will have a mix of both tactical and strategic ...

Qorvo, Inc.

Test Engineering Intern

Richardson, TX · On-site

$31 - $42/hr

Analyze wafer sort and final test data to identify yield trends, electrical failures, and opportunities for test optimization. * Assist in debugging test hardware, probe cards, load boards, and test ...

Qorvo, Inc.

Test Engineering Intern

Richardson, TX

$31 - $42/hr

Analyze wafer sort and final test data to identify yield trends, electrical failures, and opportunities for test optimization. * Assist in debugging test hardware, probe cards, load boards, and test ...

Broadcom Inc.

Principal Fab Test Engineer

Fort Collins, CO · On-site

$129 - $207/hr

... and wafer sort (100%) measurements. These tools are used to characterize and measure advanced ... As a WSD Fab Test Unit Process Engineer (TUPE), you will have a mix of both tactical and strategic ...

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Wafer Sort Test information

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$26

How much do wafer sort test jobs pay per hour?

As of Sep 4, 2026, the average hourly pay for wafer sort test in the United States is $19.16, according to ZipRecruiter salary data. Most workers in this role earn between $17.07 and $20.67 per hour, depending on experience, location, and employer.

What is a wafer sort test?

A Wafer Sort Test is a process used in semiconductor manufacturing to electrically test each individual die on a silicon wafer before it is cut and packaged. This testing identifies defective chips early in the production process, which helps improve overall yield and reduce costs. The test is performed using specialized equipment called a wafer prober and test system, and the results are used to map out good and bad dies for further processing.

What are the key skills and qualifications needed to thrive as a wafer sort test engineer?

To excel as a Wafer Sort Test Engineer, you need a solid background in electrical engineering, semiconductor physics, and experience with automated test equipment (ATE) and wafer probing processes. Familiarity with programming languages such as Python or C++, test data analysis tools, and industry certifications like ISTQB or Six Sigma are often required. Strong analytical thinking, attention to detail, and effective communication skills set outstanding candidates apart. These abilities ensure accurate testing, efficient problem-solving, and high-quality semiconductor products in a rapidly evolving industry.

What are some common challenges faced in a wafer sort test role and how can they be addressed?

Professionals in Wafer Sort Test roles often encounter challenges such as handling high-volume testing schedules, quickly diagnosing yield issues, and ensuring data accuracy under tight deadlines. Effective communication with process engineers and equipment maintenance teams is crucial to swiftly resolve equipment or process-related problems. Staying organized, leveraging automated test systems, and proactively participating in cross-functional meetings can help address these challenges and contribute to smoother operations.

What is the difference between Wafer Sort Test vs Device Test Engineer?

AspectWafer Sort TestDevice Test Engineer
CredentialsTechnical certifications, associate degrees in electronics or semiconductor technologyEngineering degree, often in electrical or electronics engineering
Work EnvironmentCleanroom environments focused on wafer testingLaboratories or production floors testing finished devices
Industry UsagePrimarily in semiconductor manufacturing plantsIn semiconductor companies, testing finished or packaged devices
Common Search/ComparisonOften compared for roles in semiconductor testing processesRelated but focuses on device-level testing after wafer testing

Wafer Sort Test involves testing semiconductor wafers during manufacturing to identify functional chips before dicing. Device Test Engineers focus on testing individual semiconductor devices after packaging. Both roles require technical skills and work in semiconductor environments, but they differ in testing stage and scope.

Infographic showing various Wafer Sort Test job openings in the United States as of August 2026, with employment types broken down into 100% Full Time. Highlights an 100% In-person job distribution, with an average salary of $39,852 per year, or $19.2 per hour.

Sr. IC Packaging Test Engineer, Silicon Technology (Starlink)

Future Ventures

Bastrop, TX • On-site

$140 - $190/hr

Other

Posted 17 days ago

Job description

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars.

Sr. IC PACKAGING TEST ENGINEER, SILICON TECHNOLOGY (STARLINK)

Starlink believes in providing fast, reliable internet to those that need it most. We design, build, and launch the world's largest and most advanced satellite constellation that is capable of delivering high-speed internet to even the most remote locations. We also design, build, and ship the hardware that sits in the homes of our customers all around the world. And while our hardware and network are incredibly advanced, we keep the end-user experience impressively simple - our customers have internet within 10 minutes of unboxing.

In true SpaceX fashion, Starlink is taking the next step in vertical integration by bringing integrated circuit packaging and assembly in-house for development and manufacturing. We are looking for talented hands-on and dynamic test engineers with expertise in semiconductor packaging and wafer test. You will work closely with test equipment manufacturers and in-house chip & system designers to develop and release production test solutions. You will assume full ownership of packaged component and wafer test as we strive to make Starlink more affordable to those that need it most.

RESPONSIBILITIES:
  • Own electrical test equipment definition for packaging and wafer level production testing
  • Bring-up of test equipment and test programs for mass manufacturing
  • Create automated test equipment (ATE) test programs and test plans
  • Define full and comprehensive testing requirements to ensure product conformance
  • Schematic and electrical review for all test equipment
  • Supplier test interface for implementing new features, cost, and productivity improvements
  • Implement advanced testing solutions for SpaceX next generation products
BASIC QUALIFICATIONS:
  • Bachelor's degree in electrical engineering, computer engineering, computer science, physics, or other applied engineering discipline
  • 5+ years of programming experience in C/C++/Visual/Python
PREFERRED SKILLS AND EXPERIENCE:
  • 10+ years industry experience with microelectronics packaging development
  • Advanced technical degree
  • Expertise in developing digital, high-speed and RF semiconductor test programs for production
  • Strong RF test knowledge
  • Experience with digital, high speed SERDES, RF, and mixed signal testing
  • Wafer sort, wafer probe, probe card design and test experience
  • Custom socket and wafer prober design and test experience
  • Semiconductor functional and parametric test design and development
  • Digital waveform and test plan programming development
ADDITIONAL REQUIREMENTS:
  • Ability to work extended hours or weekends as needed for mission critical deadlines
ITAR REQUIREMENTS:
  • To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here.

SpaceX is an Equal Opportunity Employer; employment with SpaceX is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.

Applicants wishing to view a copy of SpaceX's Affirmative Action Plan for veterans and individuals with disabilities, or applicants requiring reasonable accommodation to the application/interview process should reach out to EEOCompliance@spacex.com.

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