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Wafer Sort Test Jobs (NOW HIRING)

Astera Labs

Lead Product Engineer

San Jose, CA

$133K - $185K/yr

Production Test Development * Develop and optimize ATE test programs for RF and high-speed I/O parametric testing * Define test coverage strategies that balance quality, cost, and throughput for ...

Etched

Product Engineer, Silicon Validation

San Jose, CA · On-site

$2K/mo

Experience managing wafer sort and final test across multiple advanced process nodes * GPU, HPC, or AI accelerator chip testing background with production scale results * HBM or high-speed memory ...

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Wafer Sort Test information

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How much do wafer sort test jobs pay per hour?

As of Jun 4, 2026, the average hourly pay for wafer sort test in the United States is $19.16, according to ZipRecruiter salary data. Most workers in this role earn between $17.07 and $20.67 per hour, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a Wafer Sort Test Engineer, and why are they important?

To excel as a Wafer Sort Test Engineer, you need a solid background in electrical engineering, semiconductor physics, and experience with automated test equipment (ATE) and wafer probing processes. Familiarity with programming languages such as Python or C++, test data analysis tools, and industry certifications like ISTQB or Six Sigma are often required. Strong analytical thinking, attention to detail, and effective communication skills set outstanding candidates apart. These abilities ensure accurate testing, efficient problem-solving, and high-quality semiconductor products in a rapidly evolving industry.

What are some common challenges faced in a Wafer Sort Test role and how can they be addressed?

Professionals in Wafer Sort Test roles often encounter challenges such as handling high-volume testing schedules, quickly diagnosing yield issues, and ensuring data accuracy under tight deadlines. Effective communication with process engineers and equipment maintenance teams is crucial to swiftly resolve equipment or process-related problems. Staying organized, leveraging automated test systems, and proactively participating in cross-functional meetings can help address these challenges and contribute to smoother operations.

What is a Wafer Sort Test?

A Wafer Sort Test is a process used in semiconductor manufacturing to electrically test each individual die on a silicon wafer before it is cut and packaged. This testing identifies defective chips early in the production process, which helps improve overall yield and reduce costs. The test is performed using specialized equipment called a wafer prober and test system, and the results are used to map out good and bad dies for further processing.

What is the difference between Wafer Sort Test vs Device Test Engineer?

AspectWafer Sort TestDevice Test Engineer
CredentialsTechnical certifications, associate degrees in electronics or semiconductor technologyEngineering degree, often in electrical or electronics engineering
Work EnvironmentCleanroom environments focused on wafer testingLaboratories or production floors testing finished devices
Industry UsagePrimarily in semiconductor manufacturing plantsIn semiconductor companies, testing finished or packaged devices
Common Search/ComparisonOften compared for roles in semiconductor testing processesRelated but focuses on device-level testing after wafer testing

Wafer Sort Test involves testing semiconductor wafers during manufacturing to identify functional chips before dicing. Device Test Engineers focus on testing individual semiconductor devices after packaging. Both roles require technical skills and work in semiconductor environments, but they differ in testing stage and scope.

Infographic showing various Wafer Sort Test job openings in the United States as of May 2026, with employment types broken down into 13% Locum Tenens, 16% Internship, 46% Full Time, 7% Temporary, 11% Contract, and 7% Nights. Highlights an 99% Physical, and 1% Remote job distribution, with an average salary of $39,852 per year, or $19.2 per hour.
ATE Test Engineering Architect

ATE Test Engineering Architect

Cadence Design Systems Inc.

San Jose, CA

$178K - $331K/yr

Full-time

Medical, Dental, Vision, Retirement, PTO

Posted 7 days ago

Job description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

We are seeking a ATE Test Engineering Architect to lead development and deployment of production test solutions for our large complex SoCs deployed in our Emulation Products. This role owns ATE test strategy and execution from first silicon bringup through qualification and highvolume manufacturing, working closely with design, DFT, and global manufacturing partners.

This is a handson technical leadership role for engineers passionate about silicon quality, yield, and scalable test solutions.

Job Responsibilities:

  • Lead ATE test development for wafer sort (CP) and final test (FT)
  • Drive firstsilicon bringup, debug, and characterization
  • Define test coverage, binning, guardbanding, and production release criteria
  • Analyze yield and failure data; drive testrelated yield and quality improvements
  • Partner with DFT, design, OSATs, and test houses to ensure manufacturable solutions
  • Support qualification, production ramp, and sustained manufacturing
  • Mentor engineers and act as a technical test leader across product teams

Job Qualifications:

  • BS with a minimum of 12 years of experience OR MS with a minimum of 10 years of experience OR PhD with a minimum of 8 years of experience
  • Strong handson experience with CP/FT test program development
  • Experience with Advantest 93K ATE platform
  • Solid understanding of DFT and silicon debug
  • Proven experience supporting production and working with offshore test partners
  • Strong problemsolving and crossfunctional communication skills

The annual salary range for California is $178,500 to $331,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

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