$81K - $108K/yr
Senior Wafer Test Hardware Engineer, Raxium Google Fremont, CA, USA Mid Experience driving progress ... Drive the specification process for a parallel wafer-level test tool, coordinating with internal ...
$81K - $108K/yr
Senior Wafer Test Hardware Engineer, Raxium Google Fremont, CA, USA Mid Experience driving progress ... Drive the specification process for a parallel wafer-level test tool, coordinating with internal ...
$81K - $108K/yr
Senior Wafer Test Hardware Engineer, Raxium Google Fremont, CA, USA Mid Experience driving progress ... Drive the specification process for a parallel wafer-level test tool, coordinating with internal ...
Fremont, CA · On-site
$121K - $161K/yr
Senior Wafer Test Hardware Engineer, Raxium Google Fremont, CA, USA Mid Experience driving progress ... Drive the specification process for a parallel wafer-level test tool, coordinating with internal ...
Fremont, CA · On-site
$121K - $161K/yr
Senior Wafer Test Hardware Engineer, Raxium Google Fremont, CA, USA Mid Experience driving progress ... Drive the specification process for a parallel wafer-level test tool, coordinating with internal ...
South Portland, ME · On-site
$83K - $112K/yr
... Test (WAT) Engineer . This position will support semiconductor technology development and high ... Analyze wafer-level parametric data, process control monitor structures, and device electrical ...
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South Portland, ME · On-site
$83K - $112K/yr
... Test (WAT) Engineer . This position will support semiconductor technology development and high ... Analyze wafer-level parametric data, process control monitor structures, and device electrical ...
$83K - $112K/yr
Analyze wafer-level parametric data, process control monitor structures, and device electrical ... test equipment and electrical measurement systems. * Programming experience in Python, C/C++, Perl ...
$83K - $112K/yr
Analyze wafer-level parametric data, process control monitor structures, and device electrical ... test equipment and electrical measurement systems. * Programming experience in Python, C/C++, Perl ...
Cambridge, MA · On-site
$90K - $180K/yr
Our growing team is looking for a Photonic Test Development Engineer ... This person will develop and help execute cutting-edge wafer-level measurements on our photonic ...
Cambridge, MA · On-site
$90K - $180K/yr
Our growing team is looking for a Photonic Test Development Engineer ... This person will develop and help execute cutting-edge wafer-level measurements on our photonic ...
Portland, ME · On-site
$83K - $112K/yr
Analyze wafer-level parametric data, process control monitor structures, and device electrical ... test equipment and electrical measurement systems. * Programming experience in Python, C/C++, Perl ...
Portland, ME · On-site
$83K - $112K/yr
Analyze wafer-level parametric data, process control monitor structures, and device electrical ... test equipment and electrical measurement systems. * Programming experience in Python, C/C++, Perl ...
Correlate wafer-level test data with packaged-device, subsystem, and system-level performance ... Design and implement scalable validation platforms supporting engineering development ...
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Correlate wafer-level test data with packaged-device, subsystem, and system-level performance ... Design and implement scalable validation platforms supporting engineering development ...
San Jose, CA · On-site
The RF Test Engineer I is responsible for characterizing, testing, and analyzing RF and microwave ... Perform wafer-level characterization and device validation. * Set up and maintain automated ...
San Jose, CA · On-site
The RF Test Engineer I is responsible for characterizing, testing, and analyzing RF and microwave ... Perform wafer-level characterization and device validation. * Set up and maintain automated ...
San Jose, CA · On-site
The RF Test Engineer I is responsible for characterizing, testing, and analyzing RF and microwave ... Perform wafer-level characterization and device validation. * Set up and maintain automated ...
San Jose, CA · On-site
The RF Test Engineer I is responsible for characterizing, testing, and analyzing RF and microwave ... Perform wafer-level characterization and device validation. * Set up and maintain automated ...
ELECTRICAL ENGINEER, SILICON RELIABILITY TEST (STARLINK) As an electrical engineer on the Starlink ... You will be responsible for package-level and wafer-level reliability testing, including HTOL and ...
ELECTRICAL ENGINEER, SILICON RELIABILITY TEST (STARLINK) As an electrical engineer on the Starlink ... You will be responsible for package-level and wafer-level reliability testing, including HTOL and ...
Fremont, CA · On-site
$121K - $161K/yr
Drive the specification process for a parallel wafer-level test tool, coordinating with internal teams on pad accommodations and initial bring-up plans. * Define and execute the hardware/software ...
Fremont, CA · On-site
$121K - $161K/yr
Drive the specification process for a parallel wafer-level test tool, coordinating with internal teams on pad accommodations and initial bring-up plans. * Define and execute the hardware/software ...
Perform standard wafer-level electrical measurements via probing on manual and semi‑automatic ... Write and modify LabVIEW test programs and data processing tools to improve testing throughput and ...
Perform standard wafer-level electrical measurements via probing on manual and semi‑automatic ... Write and modify LabVIEW test programs and data processing tools to improve testing throughput and ...
Own electrical test equipment definition for packaging and wafer level production testing * Bring-up of test equipment and test programs for mass manufacturing * Create automated test equipment (ATE ...
Own electrical test equipment definition for packaging and wafer level production testing * Bring-up of test equipment and test programs for mass manufacturing * Create automated test equipment (ATE ...
ELECTRICAL ENGINEER, SILICON RELIABILITY TEST (STARLINK) As an electrical engineer on the Starlink ... You will be responsible for package-level and wafer-level reliability testing, including HTOL and ...
ELECTRICAL ENGINEER, SILICON RELIABILITY TEST (STARLINK) As an electrical engineer on the Starlink ... You will be responsible for package-level and wafer-level reliability testing, including HTOL and ...
ELECTRICAL ENGINEER, SILICON RELIABILITY TEST (STARLINK) As an electrical engineer on the Starlink ... You will be responsible for package-level and wafer-level reliability testing, including HTOL and ...
ELECTRICAL ENGINEER, SILICON RELIABILITY TEST (STARLINK) As an electrical engineer on the Starlink ... You will be responsible for package-level and wafer-level reliability testing, including HTOL and ...
Santa Clara, CA · On-site
Board Level Test Engineer Location : Santa Clara, CA- 100% onsite Responsibilities: We are now open for entry level profiles, with strong expertise in Python and EE hardware. Please share BSEE/MSEE ...
Santa Clara, CA · On-site
Board Level Test Engineer Location : Santa Clara, CA- 100% onsite Responsibilities: We are now open for entry level profiles, with strong expertise in Python and EE hardware. Please share BSEE/MSEE ...
Stafford, VA · On-site
Job Title- Mid-Level Test Engineer Project Location - Hybrid in Stafford, Virginia Duration- 6+ months contract There are three rounds in this process - Phone screen, followed by two video interviews ...
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Stafford, VA · On-site
Job Title- Mid-Level Test Engineer Project Location - Hybrid in Stafford, Virginia Duration- 6+ months contract There are three rounds in this process - Phone screen, followed by two video interviews ...
Colorado Springs, CO · On-site
$140K - $160K/yr
Torch Technologies is currently seeking a Senior-Level Test Engineer to support operational test events and campaigns for space command and control systems in support of Delta 12, Space Training and ...
Colorado Springs, CO · On-site
$140K - $160K/yr
Torch Technologies is currently seeking a Senior-Level Test Engineer to support operational test events and campaigns for space command and control systems in support of Delta 12, Space Training and ...
Stafford, VA · On-site
Job Title- Mid-Level Test Engineer Project Location - Stafford, VA (Hybrid) Duration- 6+ months contract to hire Candidates must be a U.S. Citizen with Active Secret Clearance and will need to ...
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Stafford, VA · On-site
Job Title- Mid-Level Test Engineer Project Location - Stafford, VA (Hybrid) Duration- 6+ months contract to hire Candidates must be a U.S. Citizen with Active Secret Clearance and will need to ...
San Jose, CA · On-site
$115K - $150K/yr
Build test infrastructure for wafer-level and package-level RF-MEMS testing, including probe ... Collaborate cross-functionally with RF design, MEMS design, process engineering, reliability, and ...
San Jose, CA · On-site
$115K - $150K/yr
Build test infrastructure for wafer-level and package-level RF-MEMS testing, including probe ... Collaborate cross-functionally with RF design, MEMS design, process engineering, reliability, and ...
$11K - $26.7K
0% of jobs
$26.7K - $42.4K
13% of jobs
$42.4K - $58K
0% of jobs
$58K - $73.7K
0% of jobs
$79.6K is the 25th percentile. Wages below this are outliers.
$73.7K - $89.4K
31% of jobs
The median wage is $95.2K / yr.
$89.4K - $105.1K
15% of jobs
$105.1K - $120.8K
3% of jobs
$134.9K is the 75th percentile. Wages above this are outliers.
$120.8K - $136.5K
13% of jobs
$136.5K - $152.1K
7% of jobs
$152.1K - $167.8K
8% of jobs
$167.8K - $183.5K
8% of jobs
$11K
$109.6K
$183.5K
| Aspect | Wafer Level Test Engineer | Test Engineer |
|---|---|---|
| Credentials | Typically requires a degree in Electrical Engineering, Electronics, or related fields | Similar educational background, often with additional certifications in testing or quality assurance |
| Work Environment | Works primarily in semiconductor fabrication and testing labs, focusing on wafer testing processes | Works in various industries including electronics, manufacturing, and product testing environments |
| Industry Usage | Commonly employed in semiconductor and integrated circuit manufacturing | Used across multiple industries involving product testing and quality control |
The main difference between a Wafer Level Test Engineer and a Test Engineer lies in their focus areas. Wafer Level Test Engineers specialize in testing semiconductor wafers during manufacturing, while Test Engineers may work on testing finished products across various industries. Both roles require similar technical skills and educational backgrounds, but their work environments and specific responsibilities differ significantly.
For Wafer Level Test Engineer jobs, the most frequently searched job titles are:

On-site
$81K - $108K/yr
Other
Posted 4 days ago
8.8
Based on 103 frontline employees who took The Breakroom Quiz
Google Fremont, CA, USA
MidExperience driving progress, solving problems, and mentoring more junior team members; deeper expertise and applied knowledge within relevant area.
Google's custom-designed machines make up one of the largest and most powerful computing infrastructures in the world. The Hardware Testing Engineering team ensures that this cutting-edge equipment is reliable. In the R&D lab, you design test equipment for prototypes of our machinery and develop the protocols used to scale these tests for the entire global team. Working closely with design engineers, you give input on designs to improve our hardware until you're sure it meets Google's standards of quality and reliability.
Google's Raxium display group has established a revolutionary semiconductor materials display technology that enables new functionality in display products, bringing to users a closer and more natural linkage between the digital and physical realms in applications such as augmented reality (AR) and light-field display. With start-up roots and a state-of-the-art compound semiconductor fab in Silicon Valley, Raxium is seeking to build upon its engineering team with an aim to disrupt next-generation display markets.
Individual pay is determined by factors including job-related skills, experience, and relevant education or training.
US: $159000 - $230000 (USD) + 15% bonus target + equity + benefits Learn more about benefits at Google .
Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents-to-be, criminal histories consistent with legal requirements, or any other basis protected by law. See also Google's EEO Policy , Know your rights: workplace discrimination is illegal , Belonging at Google , and How we hire .
Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.
Equity is granted exclusively and discretionarily by Alphabet Inc. on the basis of an agreement concluded between you and Alphabet Inc. Alphabet Inc. is your sole contractual partner with respect to equity grants. GSU grants are not guaranteed, are discretionary, are subject to approval by the Alphabet Inc. board of directors or its delegate, the terms of the relevant Alphabet Inc. stock plan, and your grant agreement. They have no impact on statutory payments. Current or past grants do not confer an acquired right.
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Software development and technology, communication and media
10,000+ Employees
Mountain View, CA, US