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Wafer Fab Integration Yield Improvement Engineer Jobs

Nokia

Staff Yield Engineer

Sunnyvale, CA · On-site

... InP photonic integrated circuit (PIC) wafer fab. This role operates with a high degree of ... Hands-on experience in yield improvement, process control, process integration, or manufacturing ...

Nokia

Principal Yield Engineer

Sunnyvale, CA · On-site

... wide yield improvement, manufacturing process control, and new Fab ramp readiness in a rapidly ... integrated circuit (PIC) wafer fab environment. This role serves as a recognized subject matter ...

Nokia

Principal Yield Engineer

Sunnyvale, CA · On-site

$130K - $241K/yr

... wide yield improvement, manufacturing process control, and new Fab ramp readiness in a rapidly ... integrated circuit (PIC) wafer fab environment. This role serves as a recognized subject matter ...

Semtech

Process Integration Engineer

Alhambra, CA · On-site

$93K - $135K/yr

... across all wafer fab process modules, ensuring compatibility, robustness, and high-yield ... Partner with manufacturing and process teams to implement yield improvement and defect reduction ...

Nokia

Wafer Fab Supervisor

San Jose, CA · On-site

You will also support the initial startup of our new wafer fab facility, including the management ... Education Required: 4-year degree or equivalent in Industrial Engineering, Management or related ...

Nokia

Wafer Fab Supervisor

San Jose, CA · On-site

You will also support the initial startup of our new wafer fab facility, including the management ... Education Required: 4-year degree or equivalent in Industrial Engineering, Management or related ...

Nokia

Wafer Fab Supervisor

San Jose, CA · On-site

You will also support the initial startup of our new wafer fab facility, including the management ... Education Required: 4-year degree or equivalent in Industrial Engineering, Management or related ...

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Wafer Fab Integration Yield Improvement Engineer information

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How much do wafer fab integration yield improvement engineer jobs pay per year?

As of Sep 11, 2026, the average yearly pay for wafer fab integration yield improvement engineer in the United States is $124,275.00, according to ZipRecruiter salary data. Most workers in this role earn between $104,000.00 and $140,000.00 per year, depending on experience, location, and employer.

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Infographic showing various Wafer Fab Integration Yield Improvement Engineer job openings in the United States as of August 2026, with employment types broken down into 1% As Needed, 86% Full Time, 9% Part Time, 3% Contract, and 1% Nights. Highlights an 92% Physical, 3% Hybrid, and 5% Remote job distribution, with an average salary of $124,275 per year, or $59.7 per hour.

Wafer Fab Integration Engineering Technician (Weekend Day Shift)

San Jose, CA • On-site

Nokia
Media and Telecom • 10K+ employees
Learn more about Nokiaexternal

Full-time

Re-posted 7 days ago

Nokia rating

7.9

Company rating: 7.9 out of 10

Based on 6 frontline employees who took The Breakroom Quiz

Job description

Job Summary

Nokia's Photonic Integrated Circuit (PIC) wafer fabs in Sunnyvale and San Jose focus on the production and R&D of advanced Indium Phosphide (InP) semiconductor devices. As a Wafer Fab Integration Engineering Technician, you will play a critical role in supporting wafer fabrication processes, improving product quality, and reducing defects.

This position offers the opportunity to work closely with cross-functional engineering teams to troubleshoot complex process issues, enhance yield and reliability, and contribute to the ramp-up of a high-volume manufacturing facility in San Jose. You will be part of a collaborative environment that emphasizes teamwork, continuous learning, and cutting-edge semiconductor innovation.

Minimum Qualifications & Requirements

Bachelor's degree in Science, Engineering, or a related technical field

Minimum of 3 years of experience in a modern semiconductor fabrication environment (5+ years preferred)

Strong attention to detail with a high commitment to quality

Demonstrated problem-solving skills and ability to follow through on tasks

Self-motivated, with a willingness to learn and expand technical skills

Strong sense of ownership and accountability

Effective team player with strong verbal and written communication skills

Ability to manage multiple tasks, prioritize work, and meet deadlines

Proficiency in using computer systems and software tools for data analysis and reporting

Preferred Qualifications:

Experience with Indium Phosphide (InP) or Gallium Arsenide (GaAs) semiconductor processes

Familiarity with wafer fab processes such as photolithography, etch, deposition, and CVD

Key Responsibilities

Investigate root causes for production lots placed on hold and drive corrective actions

Troubleshoot performance issues and yield excursions within the wafer fabrication process

Support engineering tool qualifications and process validations

Assist engineers with failure analysis, including:

o Visual inspections

o CD-SEM measurements

o Electrical IV testing

o Profilometry depth measurements

Utilize Manufacturing Execution Systems (MES) to:

o Collect and track data

o Perform basic data analysis

o Generate reports (e.g., PowerPoint presentations)

Monitor Statistical Process Control (SPC) charts and provide first-level response to out-of-control conditions

Coordinate and track qualification and development lots across fabrication, assembly, and test operations

Ensure compliance with PIC product quality systems and standards

Support next-generation PIC platform development, including technology transfer and production ramp

Collaborate with cross-functional teams to improve process integration, yield, and device performance

Work Schedule: Weekend day shift - Friday, Saturday, Sunday, and every other Thursday from 6:00 AM to 6:00 PM

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