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Volunteer Rtl Verification Jobs in Sunnyvale, CA

Design Verification Engineer

San Jose, CA · On-site

$120K - $200K/yr

You'll build SystemVerilog and UVM verification environments alongside architects, RTL designers ... We also offer Dental, Vision, Short/Long term Disability, Basic Life, Voluntary Life, and AD&D ...

Collaborate closely with RTL design, DFT, and verification teams to manage frontend-to-backend ... deemed voluntary and shall not create any express or implied obligation on the part of the ...

Collaborate closely with RTL design, DFT, and verification teams to manage frontend-to-backend ... deemed voluntary and shall not create any express or implied obligation on the part of the ...

Develop and verify RTL designs using industry-standard design methodologies. * Provide design ... Donation Matching and volunteering opportunities * Corporate discount programs * Free Breakfast ...

AI System Engineer

San Jose, CA · On-site

$117K - $160K/yr

... RTL logic design, verification, and FPGA prototypes * Develop and maintain hardware specifications ... Donation Matching and volunteering opportunities * Corporate discount programs * Free Breakfast ...

AI System Engineer

San Jose, CA · On-site

$155K - $215K/yr

... RTL logic design, verification, and FPGA prototypes * Develop and maintain hardware specifications ... Donation Matching and volunteering opportunities * Corporate discount programs * Free Breakfast ...

HBM Logic Architect

San Jose, CA · On-site

$150K - $320K/yr

Develop and verify RTL designs using industry-standard design methodologies. * Provide design ... Donation Matching and volunteering opportunities * Corporate discount programs * Free Breakfast ...

AI Memory Solution Architect

San Jose, CA · On-site

$73.75 - $97.25/hr

... RTL logic design, verification and FPGA prototypes * Optimize memory system architecture for ... Donation Matching and volunteering opportunities * Corporate discount programs * Free Breakfast ...

AI System Engineer

San Jose, CA · On-site

$117K - $160K/yr

... RTL logic design, verification, and FPGA prototypes * Develop and maintain hardware specifications ... Donation Matching and volunteering opportunities * Corporate discount programs * Free Breakfast ...

AI Memory Solution Architect

San Jose, CA · On-site

$155K - $255K/yr

... RTL logic design, verification and FPGA prototypes * Optimize memory system architecture for ... Donation Matching and volunteering opportunities * Corporate discount programs * Free Breakfast ...

Define, design and verify ASIC and ASIC subsystems to be deployed in a range of Cisco platforms ... Prior experience with RTL development skills and experiences * Prior experience with CDC/RDC ...

Define, design and verify ASIC and ASIC subsystems to be deployed in a range of Cisco platforms ... Prior experience with RTL development skills and experiences * Prior experience with CDC/RDC ...

Volunteer Rtl Verification information

See Sunnyvale, CA salary details

$9

$22

$39

How much do volunteer rtl verification jobs pay per hour?

As of Sep 8, 2026, the average hourly pay for volunteer rtl verification in Sunnyvale, CA is $22.46, according to ZipRecruiter salary data. Most workers in this role earn between $16.92 and $23.70 per hour, depending on experience, location, and employer.

What is the difference between Volunteer RTL Verification vs Test Engineer?

AspectVolunteer RTL VerificationTest Engineer
Required CredentialsBasic understanding of digital design, HDL knowledgeEngineering degree, testing certifications often preferred
Work EnvironmentVolunteer or internship settings, collaborative teamsCorporate or manufacturing environments, structured processes
Industry UsageSemiconductor, electronics, hardware developmentElectronics, software, hardware testing across industries
Common Search/ComparisonYesYes

Volunteer RTL Verification focuses on assisting with digital design testing in a volunteer or internship capacity, often requiring HDL knowledge. Test Engineers typically hold engineering degrees and work in structured environments, performing comprehensive testing of hardware or software products. While both roles involve verification, Volunteer RTL Verification is more entry-level and volunteer-based, whereas Test Engineers are full-time professionals with formal credentials.

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For Volunteer Rtl Verification jobs in Sunnyvale, CA, the most frequently searched job titles are:

What job categories do people searching Volunteer Rtl Verification jobs in Sunnyvale, CA look for?

The top searched job categories for Volunteer Rtl Verification jobs in Sunnyvale, CA are:

What cities near Sunnyvale, CA are hiring for Volunteer Rtl Verification jobs?

Cities near Sunnyvale, CA with the most Volunteer Rtl Verification job openings:

Infographic showing various Volunteer Rtl Verification job openings in Sunnyvale, CA as of September 2026, with employment types broken down into 1% As Needed, 80% Full Time, 15% Part Time, 3% Contract, and 1% Nights. Highlights an 89% Physical, 3% Hybrid, and 8% Remote job distribution, with an average salary of $46,717 per year, or $22.5 per hour.

Design Verification Engineer

SambaNova

San Jose, CA • On-site

$120K - $200K/yr

Full-time

Medical, Dental, Vision, Life

Posted 20 days ago


Job description

The era of pervasive AI has arrived. In this era, organizations will use generative AI to unlock hidden value in their data, accelerate processes, reduce costs, drive efficiency and innovation to fundamentally transform their businesses and operations at scale.
SambaNova Suite™ is the first full-stack, generative AI platform, from chip to model, optimized for enterprise and government organizations. Powered by the intelligent SN40L chip, the SambaNova Suite is a fully integrated platform, delivered on-premises or in the cloud, combined with state-of-the-art open-source models that can be easily and securely fine-tuned using customer data for greater accuracy. Once adapted with customer data, customers retain model ownership in perpetuity, so they can turn generative AI into one of their most valuable assets.
About the team
The Design Verification team works on the RDU, SambaNova's chip for machine learning and AI workloads. This group focuses on chip-level control and initialization: sequencing, state transitions, clocking, and recovery across multiple subsystems on the chip. You'll build SystemVerilog and UVM verification environments alongside architects, RTL designers, and firmware engineers, and take ownership of verification plans from first draft through closure. The team works closely with the broader verification organization, so debugging and root-causing issues often means coordinating across groups rather than working in isolation.
About the role
SambaNova Systems is looking for a talented and motivated Design Verification Engineer, DFT to help us build state of the art RDU chips for machine learning and artificial intelligence.
Responsibilities
Some of your responsibilities will include:
  • Develop and execute comprehensive verification plans for complex chip-level control and initialization features
  • Develop SystemVerilog/UVM based verification environments, test sequences, checkers, assertions, and functional coverage
  • Verify complex sequencing, dependencies, state transitions, and recovery scenarios across multiple chip subsystems
  • Develop directed and constrained-random tests to identify architectural and implementation corner cases
  • Closely work with architects, RTL designers, firmware, and other verification teams to understand design intent and drive verification closure
  • Debug simulation and regression failures and work with design teams to root-cause and resolve issues
  • Analyze regression failures, functional and code coverage and drive verification to closure
Required Qualifications
  • B.S. in Computer Science, Computer Engineering, or related field
  • 5+ years relevant industry experience
  • Strong understanding of digital design, SoC architecture, and verification methodologies
  • Strong proficiency in SystemVerilog and UVM is required
  • Experience with constrained-random verification, functional coverage, and assertion-based verification
  • Good understanding of chip initialization, control sequencing, clocking, and cross-domain interactions
  • Strong simulation debug and problem-solving skills
  • Proficiency in scripting languages, e.g. Python, Perl, TCL and shell scripting, etc. is required
Preferred Qualifications
  • Familiarity with CDC/RDC concepts and verification methodologies
  • Fluency in Claude / AI tools for verification development and debug

Base Salary Range:
Base Pay Range
$120,000-$200,000 USD
Submission GuidelinesPlease note that in order to be considered an applicant for any position at SambaNova Systems, you must submit an application form for each position for which you believe you are qualified.
EEO PolicySambaNova Systems is an Equal Opportunity/Affirmative Action Employer. All qualified applicants will receive consideration for employment without regard basis of age (40 and over), color, disability, gender identity, genetic information, marital status, military or veteran status, national origin/ancestry, race, religion, creed, sex (including pregnancy, childbirth, breastfeeding), sexual orientation, and any other applicable status protected by federal, state, or local laws.
Benefits Summary for US-Based, Full-Time Employment Positions
SambaNova offers a competitive total rewards package, including the base salary, plus equity and benefits. We cover 95% premium coverage for employee medical insurance, and 77% premium coverage for dependents and offer a Health Savings Account (HSA) with employer contribution. We also offer Dental, Vision, Short/Long term Disability, Basic Life, Voluntary Life, and AD&D insurance plans in addition to Flexible Spending Account (FSA) options like Health Care, Limited Purpose, and Dependent Care. Our library of well-being benefits available to you and your dependents includes a full subscription to Headspace, Gympass+ membership with access to physical gyms, One Medical membership, counseling services with an Employee Assistance Program, and much more.