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Vlsi Physical Design Intern Jobs (NOW HIRING)

Physical Design Engineer * Design Verification Engineer Compensation up to $225K DOE + strong benefits + long-term project stability. What You Need (All Roles) * 8+ years of pre-silicon ASIC / VLSI ...

Physical Design Engineer

Sunnyvale, CA · On-site

$159K - $164K/yr

Job Title: Physical Design Engineer Location:Sunnyvale, CA OR Austin,TX Duration: Long term ... The ideal candidate will be responsible for various aspects of the backend VLSI design flow ...

$140K - $156K/yr

The Physical Design Engineer willbe an integral part of the physical design team with all aspects ... Good understanding in VLSI digital design/Layout/Timing closure * Basic knowledge on circuit design ...

Physical Design Engineer

San Jose, CA

$159K - $164K/yr

Company Description Insilico is an End-to-End specialized VLSI, Embedded Design & Software services ... Job Title: Physical Design Engineer Location: San Jose, CA Experience: 5- 8 Years Duration: 12 ...

Physical Design Engineer

San Jose, CA · On-site

$159K - $164K/yr

Company Description Insilico is an End-to-End specialized VLSI, Embedded Design & Software services ... Job Title: Physical Design Engineer Location: San Jose, CA Experience: 5- 8 Years Duration: 12 ...

Graphic Design Intern

Milwaukee, WI · On-site

$14.75 - $19.75/hr

The Graphic Design Intern will work alongside Visit Milwaukee's marketing and creative team to ... PHYSICAL REQUIREMENTS: * Ability to work at a desk, operate a computer and view a screen for ...

Senior Physical Design Engineer

Sunnyvale, CA · On-site

$161K - $166K/yr

Tech in ECE, EE, or VLSI. · 8-14 years hands-on physical design experience. · Expert in Fusion Compiler, low power design, and PPA optimization. Strong scripting skills (Tcl/Python/Shell). · Good ...

Graphic Design Intern

Milwaukee, WI

$14.75 - $19.75/hr

The Graphic Design Intern will work alongside Visit Milwaukee's marketing and creative team to ... PHYSICAL REQUIREMENTS: * Ability to work at a desk, operate a computer and view a screen for ...

Physical Design Engineer (7452)

San Jose, CA · On-site

$155K - $160K/yr

Join our dynamic Test Chip Physical Implementation team in San Jose, CA, and play a critical role ... This is an exciting opportunity for an engineer with a strong foundation in VLSI design, a passion ...

Physical Design Engineer (7452)

San Jose, CA

$155K - $160K/yr

Join our dynamic Test Chip Physical Implementation team in San Jose, CA, and play a critical role ... This is an exciting opportunity for an engineer with a strong foundation in VLSI design, a passion ...

Graphic Design Intern (PHX)

Scottsdale, AZ · On-site

$15 - $20.25/hr

... physical disability or any other legally protected status. svg]:px-3 text-sm tracking-[0.025rem] leading-[1.5rem] min-w-50" title="Click here to apply for Graphic Design Intern (PHX)" href=">Apply ...

GPU Physical Design Engineer

Austin, TX · On-site

$134K - $138K/yr

Experience or coursework with digital logic design, RTL, CMOS transistor logics or VLSI concepts ... Use design knowledge and innovative physical construction and optimization flows to push ...

Design Intern Level: Intern Supervisor: Art Director Who we are: Because you voraciously follow ... , in physical space [large scale] and non-traditional spaces. You produce design work that a ...

GPU Physical Design Engineer

Austin, TX

$134K - $138K/yr

This role requires a mix of strategic engineering along with hands-on experience in physical design ... Experience or coursework with digital logic design, RTL, CMOS transistor logics or VLSI concepts.

GPU Physical Design Engineer

Austin, TX · On-site

$134K - $138K/yr

Experience or coursework with digital logic design, RTL, CMOS transistor logics or VLSI concepts ... Use design knowledge and innovative physical construction and optimization flows to push ...

GPU Physical Design Engineer

Austin, TX

$134K - $138K/yr

This role requires a mix of strategic engineering along with hands-on experience in physical design ... Experience or coursework with digital logic design, RTL, CMOS transistor logics or VLSI concepts.

Intern: Design

New York, NY · On-site +1

$20/hr

Design Intern Level: Intern Supervisor: Art Director Who we are: Because you voraciously follow ... , in physical space [large scale] and non-traditional spaces. You produce design work that a ...

Showing results 41-60

Vlsi Physical Design Intern information

See salary details

$9

$19

$36

How much do vlsi physical design intern jobs pay per hour?

As of Aug 15, 2026, the average hourly pay for vlsi physical design intern in the United States is $19.38, according to ZipRecruiter salary data. Most workers in this role earn between $14.42 and $21.63 per hour, depending on experience, location, and employer.

What cities are hiring for Vlsi Physical Design Intern jobs?

Cities with the most Vlsi Physical Design Intern job openings:

What states have the most Vlsi Physical Design Intern jobs?

States with the most job openings for Vlsi Physical Design Intern jobs include:

ASIC / VLSI Engineers

Etech Hi

Milpitas, CA • On-site

Full-time

Re-posted 13 days ago


Job description

ASIC / VLSI ENGINEERS – RTL / STA / PD / DV (Senior Level)

We are hiring 4 experienced ASIC / VLSI Engineers (8+ years) for permanent, full-time, onsite roles in Silicon Valley supporting advanced semiconductor and AI / networking programs. These roles are within a leading semiconductor design services organization, supporting long-term engagements with tier-1 clients in networking and advanced silicon.


Open roles:

  • RTL Engineer (Networking / Ethernet)
  • STA Engineer
  • Physical Design Engineer
  • Design Verification Engineer


Compensation up to $225K DOE + strong benefits + long-term project stability.

What You Need (All Roles)

  • 8+ years of pre-silicon ASIC / VLSI experience
  • Strong background in RTL-based design environments
  • Experience at the SoC / full-chip level (not IP-only)
  • Solid understanding of ASIC lifecycle (design → tapeout)
  • Scripting experience (Python, Tcl, Perl, etc.)
  • Strong digital logic fundamentals


Must have:

  • Pre-silicon experience only (no post-silicon / firmware-only backgrounds)

Role-Specific Requirements


RTL Engineer (Networking)

  • RTL design + microarchitecture
  • Ethernet (802.3), MAC / PCS / SerDes / PHY
  • High-speed designs (100G+ preferred)
  • Tapeout + productization experience


STA Engineer

  • SoC-level timing analysis & closure
  • PrimeTime, Tempus, or similar


Physical Design Engineer

  • Floorplanning, CTS, routing, signoff
  • Timing, congestion, power optimization


Design Verification Engineer

  • SoC-level verification (required)
  • SystemVerilog / UVM
  • Full verification lifecycle


What Sets You Apart

  • Experience with complex SoC / full-chip tapeouts
  • Ability to work cross-functionally (RTL, DV, PD)
  • Background in advanced nodes (28nm and below preferred)

 

If interested and QUALIFIED, please send resume in Microsoft Word format to: krissid@etechhi.com 


Etech Hi, Inc. is an equal opportunity employer/staffing firm and we are committed to providing a workplace free from harassment and discrimination. We celebrate the unique differences of our employees and candidates because that is what drives curiosity, innovation, and the success of our business. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, gender identity or expression, age, marital status, veteran status, disability status, pregnancy, parental status, genetic information, political affiliation, or any other status protected by the laws or regulations in the locations where we operate.


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About Etech Hi

Sourced by ZipRecruiter

Industry

Recruiting and staffing services

Company size

11 - 50 Employees

Headquarters location

Temecula, CA, US

Year founded

2000