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Vlsi Design Engineering Manager Jobs (NOW HIRING)

Retym

VLSI Design Engineer

Austin, TX · On-site

$134K - $138K/yr

As an VLSI Digital Design Engineer/Micro-architect, you'll have the opportunity to design highly sophisticated, innovative new cutting edge communication systems from scratch. Key Responsibilities ...

Sandisk

Staff VLSI design engineer

Milpitas, CA · On-site

Requires MS degree in Electrical Engineering. * Knowledge and/or experience in non-volatile memory ... Design, and VLSI Circuits. * Self-motivated and self-directed, however, must have demonstrated ...

Sandisk

Staff VLSI design engineer

Milpitas, CA · On-site

Requires MS degree in Electrical Engineering. * Knowledge and/or experience in non-volatile memory ... Design, and VLSI Circuits. * Self-motivated and self-directed, however, must have demonstrated ...

Sandisk

Staff VLSI design engineer

Milpitas, CA · On-site

$147K - $251K/yr

Requires MS degree in Electrical Engineering. * Knowledge and/or experience in non-volatile memory ... Design, and VLSI Circuits. * Self-motivated and self-directed, however, must have demonstrated ...

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Vlsi Design Engineering Manager information

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How much do vlsi design engineering manager jobs pay per year?

As of Sep 13, 2026, the average yearly pay for vlsi design engineering manager in the United States is $134,466.00, according to ZipRecruiter salary data. Most workers in this role earn between $109,000.00 and $150,000.00 per year, depending on experience, location, and employer.

What does a VLSI Design Engineering Manager do?

A VLSI (Very Large Scale Integration) Design Engineering Manager oversees teams responsible for designing integrated circuits and semiconductor chips. They coordinate project timelines, manage resources, and ensure that the design process meets technical specifications and industry standards. This role typically involves collaborating with cross-functional teams, mentoring engineers, and staying updated on the latest advancements in chip design technology. The manager is also responsible for quality assurance and often works closely with manufacturing to ensure smooth production. Effective leadership and technical expertise are essential for success in this position.

What are the most common challenges faced by VLSI Design Engineering Managers when leading cross-functional teams?

VLSI Design Engineering Managers often encounter challenges such as aligning diverse teams—including digital, analog, verification, and physical design engineers—toward project milestones while balancing resource allocation and shifting priorities. Coordinating communication across geographic locations, managing tight project schedules, and ensuring design quality under strict timelines are common hurdles. Successful managers proactively facilitate collaboration, implement effective project management tools, and foster an environment where team members can raise technical concerns early. Navigating these challenges requires both strong technical expertise and exceptional leadership skills.

What are the key skills and qualifications needed to thrive as a VLSI Design Engineering Manager, and why are they important?

To excel as a VLSI Design Engineering Manager, you need a strong background in electrical engineering, digital/analog circuit design, and prior experience in VLSI development, often supported by a bachelor’s or master’s degree. Familiarity with EDA tools like Cadence or Synopsys, knowledge of RTL design, and an understanding of semiconductor manufacturing processes are essential, with certifications in relevant tools or methodologies being advantageous. Leadership, project management, and effective communication are vital soft skills for guiding teams and collaborating across departments. These skills ensure successful project delivery, innovation, and the ability to meet technical and business objectives in a highly competitive field.

What is the difference between Vlsi Design Engineering Manager vs Vlsi Design Engineer?

AspectVlsi Design Engineering ManagerVlsi Design Engineer
CredentialsBachelor's/Master's in Electrical Engineering or Computer Engineering, often with leadership experienceBachelor's or Master's in Electrical Engineering or related field
Work EnvironmentLeads teams, manages projects, collaborates with cross-functional teamsPerforms design, simulation, and verification tasks individually or in small teams
Industry UsageUsed in semiconductor companies, chip design firms, and integrated circuit industriesCommonly employed in similar settings for hands-on design work

The Vlsi Design Engineering Manager oversees design teams and manages projects, focusing on leadership and coordination. In contrast, the Vlsi Design Engineer is primarily responsible for hands-on design and verification tasks. Both roles require strong technical skills, but the manager's role emphasizes team management and strategic planning.

What are popular job titles related to Vlsi Design Engineering Manager jobs?

For Vlsi Design Engineering Manager jobs, the most frequently searched job titles are:

Infographic showing various Vlsi Design Engineering Manager job openings in the United States as of July 2026, with employment types broken down into 89% Full Time, 8% Part Time, and 3% Contract. Highlights an 87% Physical, 3% Hybrid, and 10% Remote job distribution, with an average salary of $134,466 per year, or $64.6 per hour.

VLSI Design Engineer

Austin, TX • On-site

Retym
See more jobs at Retymexternal

$134K - $138K/yr

Full-time

Re-posted 26 days ago

Job description

Description
We are looking for talented and experienced VLSI Design Engineers/Micro-architects.
As an VLSI Digital Design Engineer/Micro-architect, you'll have the opportunity to design highly sophisticated, innovative new cutting edge communication systems from scratch.
Key Responsibilities for a VLSI Design Engineer:
Work closely with Algorithm and Architecture teams
  • Understand and translate high-level algorithmic requirements into efficient hardware implementations.

Learn and analyze relevant protocols and standards
  • Interpret protocol specifications (e.g., Ethernet, etc.) and apply them accurately in design.

Participate in all design stages:
  • Micro-architecture definition
  • RTL coding (using Verilog/SystemVerilog)
  • Synthesis-friendly coding and timing-aware design

Collaborate cross-functionally:
  • Verification team: For testbench development, debug support, and functional coverage closure.
  • DFT team: Ensure design is scan-insertable, supports ATPG, BIST, etc.
  • Backend/Physical design team: For floorplanning, timing closure, and routing feedback.

Participate in Design Reviews
  • Present and defend design decisions in peer and formal reviews.

Perform Synthesis and Timing Analysis
  • Generate synthesis constraints (SDC), run synthesis, and analyze timing reports.

Debug and Fix Functional/Timing Issues
  • Collaborate in post-silicon or pre-silicon debug; use waveforms, assertions, and logic analyzers.

Optimize for Area, Power, and Performance (PPA)
  • Identify bottlenecks and opportunities for improvement within RTL.

Documentation
  • Maintain clear design documentation for reusability and reference (e.g., micro-architecture specs, interface docs).

Contribute to IP/SoC Integration
  • Work on integrating design blocks into larger systems and handling system-level interfaces.

Participate in Silicon Bring-up and Validation (optional but valuable)
  • Support bring-up of first silicon and assist with post-silicon validation, if applicable.

Keep up-to-date with Industry Trends and Tools
  • Learn new EDA tools, languages, and methodologies (e.g., CDC, Linting, Formal Verification).

Requirements
Job requirements:
  • +5 years of experience as ASIC/VLSI digital design engineer
  • Strong Verilog/System-Verilog experience
  • Familiar with simulation tools/environments, verification methodologies
  • Strong team player, solid interpersonal skills
  • Entrepreneurial can-do attitude, self-motivated, able to work independently
  • BS/MS in EE/CE from lead universities

Background in one or more of the following domains is an advantage:
  • Familiar with advanced design practices (Clock/Voltage domain crossing, Low Power Design, DFT)
  • Design DSP of oriented blocks
  • Ethernet (100G and above)
  • Scripting experience using several of the following: Python, Perl, TCL

Apply