Video Playback Engineer Jobs in Dallas, TX (NOW HIRING)

This is a full‑time position in our design engineering team, responsible for the FPGA design and development of both prototype and production units across the entire product portfolio—from concept and detailed design through manufacturing release and support of Heads Up Technologies, Inc. products and systems.

You’ll be a hands‑on designer who can also provide technical leadership on complex projects, collaborating closely with mechanical, software, and electrical engineering teams.

Work Days and Hours: Monday to Friday, 8:00 AM to 5:00 PM. Flexibility to set schedule.

Location: This is a full‑time onsite position located in Addison, TX.

Work Eligibility: Must possess unrestricted authorization to work in the United States without employer sponsorship.

• Design and implement complex video/audio processing algorithms using VHDL targeting Xilinx devices.
• Implement video pipelines including up/down conversion (4K/UHD, HDR/SDR, scaling, color conversion) and audio processing (IEC 60958 LPCM and IEC 61937 Dolby/DTS, I2S TDM, AES67, DSP functions).
• Integrate high‑speed interfaces (PCIe, DDR, Ethernet, HDMI).
• Support USB‑based 4K video playback in an embedded cabin environment.
• Conduct simulation, verification, and laboratory debugging using logic analyzers, oscilloscopes, and custom simulations.
• Collaborate with hardware and software teams on design partitioning and planning/implementation, board bring‑up, timing closure, and performance optimization.
• Collaborate with cross‑functional teams, including software, hardware, and systems engineering to develop optimal architecture and develop FPGA requirements.
• Analyze and interpret hardware schematics to support integration— no board design required.
• Integrate IP from other FPGA designers and maintain code reuse standards and practices.
• Create thorough design documents, specifications, and interface definitions.
• Contribute to existing projects with opportunities to lead new product development in the future.

• Bachelor of Science degree in Electrical Engineering (BSEE) or equivalent.
• Eight (8) or more years of hands‑on FPGA development experience.
• Proven expertise with Xilinx FPGAs and related toolchains (Vivado, etc.).
• Strong skills in creating concise and clear code in VHDL targeting Xilinx IP integration.
• Extensive experience with video I/O standards and interfaces: HDMI, DisplayPort, DSI‑2, GMSL, GigE; integration and customization of vendor/IP cores.
• Deep experience with video/audio pipelines, including real time 4K signal processing and handling digital audio streams.
• Proficiency in high‑speed digital design methods and best practices supporting multiple clock domains, AXI streaming and memory‑mapped IP interfaces, coherent configuration and status across designs, and clean clock crossings.
• Familiarity with FPGA and processor system co‑design (external and on‑die hard/soft IP processor architectures). Zynq platform experience is strongly desired.
• Ability to work in a collaborative, fast‑paced, hardware/software integrated environment.

• Experience with video compression/decompression and/or audio resampling/manipulation techniques.
• Understanding of Linux environments, including scripting for FPGA development tools.
• Exposure to DevOps practices in software/firmware CI/CD pipelines.
• Strong cross‑disciplinary collaboration skills and comfortable "wearing multiple hats."

• Medical plan options through Blue Cross Blue Shield (company paid).
• Dental and vision coverage.
• Health Savings Account option with company contribution, if eligible.
• Company paid Basic Life and AD&D insurance.
• Company paid Long Term Disability coverage.
• Voluntary Short Term Disability, Accident, and Critical Illness insurance.
• Employee Assistance and Wellness Support resources.
• Virtual care access.
• Benefit Resource Center support.
• Paid time off and paid holidays.

Benefit eligibility and coverage are based on employment status, plan documents, and company policy. Official plan documents govern all benefits.