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Video Compression Engineer Jobs in Texas (NOW HIRING)

Neuralink

Digital IC Design Engineer

Austin, TX

$134K/yr

We have crafted a team of exceptional engineers whose mission is to push the frontiers of what is ... video compression processors, AI/ML accelerators, and communication PHY/MAC will be preferred.

Heads Up Technologies

Senior FPGA Engineer

Addison, TX

$125K - $161K/yr

Preferred Qualifications • Experience with video compression/decompression and/or audio ... Our Company We are a team of engineers, innovators, creators, and problem solvers who are ...

Neuralink

Digital IC Design Engineer

Austin, TX

$116K - $233K/yr

Our Digital IC Design Engineer will be responsible for delivering micro-architecture and register ... video compression processors, AI/ML accelerators, and communication PHY/MAC will be preferred.

Bedrock

Production Technician

Cotulla, TX

$17.25 - $21.25/hr

... phone, video or virtual assist technology * Analytical prowess to leverage data and available ... Artificial lift knowledge regarding gas lift compression, plunger lift and well head compression.

Pushpay

Product Manager 2, Resi

Allen, TX · Hybrid

$99K - $110K/yr

Collaborate closely with Software Engineering, UI/UX Design, and QA to define requirements for ... video streaming, web broadcasting, media compression standards (e.g., H.264, HEVC, AV1), live event ...

Pushpay

Product Manager 2, Resi

Allen, TX · Hybrid

$99K - $110K/yr

Collaborate closely with Software Engineering, UI/UX Design, and QA to define requirements for ... video streaming, web broadcasting, media compression standards (e.g., H.264, HEVC, AV1), live event ...

All JobsVideo Compression Engineer JobsVideo Compression Engineer Jobs in Texas

Video Compression Engineer information

See Texas salary details

$28.4K

$82.3K

$130K

How much do video compression engineer jobs pay per year?

As of Jun 23, 2026, the average yearly pay for video compression engineer in Texas is $82,268.00, according to ZipRecruiter salary data. Most workers in this role earn between $60,600.00 and $101,100.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive in the Video Compression Engineer position, and why are they important?

To thrive as a Video Compression Engineer, you need a strong background in video codec theory, signal processing, and programming languages such as C/C++ or Python, often paired with a degree in computer science, electrical engineering, or a related field. Familiarity with industry-standard tools like FFmpeg, x264/x265 libraries, and potentially certifications in video engineering can be highly valuable. Strong problem-solving skills, attention to detail, and the ability to communicate technical concepts within multidisciplinary teams are important soft skills. Mastering these qualifications ensures efficient delivery of high-quality video content, seamless collaboration across teams, and innovation in evolving media technologies.

What are some typical daily responsibilities of a Video Compression Engineer?

A Video Compression Engineer typically spends their day developing, optimizing, and testing video codecs and compression algorithms to ensure efficient streaming and storage. They analyze video quality metrics, resolve encoding issues, and collaborate closely with software developers, QA teams, and product managers to integrate solutions into larger platforms. Staying up-to-date with the latest compression standards and participating in code reviews are also common tasks. This hands-on, collaborative environment allows engineers to see the direct impact of their work on user experience and product performance.

What is a Video Compression Engineer job?

A Video Compression Engineer specializes in optimizing video encoding, compression algorithms, and streaming technologies to efficiently reduce file sizes while maintaining quality. They work with codecs like H.264, HEVC, AV1, and VP9 to improve video delivery across various platforms. Their role involves algorithm development, performance tuning, and ensuring compatibility with different playback devices and network conditions.

What are popular job titles related to Video Compression Engineer jobs in Texas? For Video Compression Engineer jobs in Texas, the most frequently searched job titles are:
What job categories do people searching Video Compression Engineer jobs in Texas look for? The top searched job categories for Video Compression Engineer jobs in Texas are:
Video Compression Engineer jobs near you
Infographic showing various Video Compression Engineer job openings in Texas as of June 2026, with employment types broken down into 76% Full Time, 12% Part Time, 8% Temporary, and 4% Contract. Highlights an 87% Physical, 5% Hybrid, and 8% Remote job distribution, with an average salary of $82,268 per year, or $39.6 per hour.
Digital IC Design Engineer

Digital IC Design Engineer

Neuralink

Austin, TX

$134K/yr

Other

Posted 11 days ago

Job description

Team Description: 

The Brain Interfaces Soc Department delivers chip architecture and silicon implementation of neural recording and stimulation system-on-chip (SoC) for high-bandwidth brain-machine interface applications. We have crafted a team of exceptional engineers whose mission is to push the frontiers of what is possible today and define the future. 

Job Description & Responsibilities: 

Our Digital IC Design Engineer will be responsible for delivering micro-architecture and register-transfer level (RTL) implementation of digital IPs and systems with a focus in high-throughput low-power digital signal processor (DSP) and general-purpose hardware accelerators towards realizing state-of-the-art brain-computer interfaces. Relevant product development experience in micro-architecture design for low-power processors, on-chip bus and network interfaces, audio/video compression processors, AI/ML accelerators, and communication PHY/MAC will be preferred.

  • Micro-architecture design and RTL implementation of: 
    • Low-power digital signal processors
    • Low-power general-purpose hardware accelerators
    • Low-power graphics processing units
    • Low-power radio MAC/PHY
    • Low-power serial link MAC/PHY
  • Design and optimization of hardware/software interface with firmware engineers
  • Application-specific architecture optimization including:
    • Complex system modeling for energy and performance benchmarks
    • Workload analysis and modeling
    • Energy/performance profiling and analysis
    • Leveraging architecture-level design trade-offs with process technology and workload type
    • Balancing cost and performance under manufacturing process variation 
  • Collaboration on silicon bring-up tests with verification engineers 

Required Qualifications:

  • Bachelor of Science (B.S.) degree in Electrical Engineering and/or Computer Science or a related field, or equivalent experience
  • Evidence of exceptional ability in electrical engineering, computer science, or computer engineering
  • 5+ years of experience in digital design
  • Expertise in SystemVerilog, C/C++, Python
  • Experience working on complex digital systems from architecture, microarchitecture, and RTL, using industry standard tools
  • Experience in designing digital signal processing pipelines, from algorithm to RTL

Preferred Qualifications: 

  • Experience in architecture optimization with process technology customization
  • Experience in the verification of complex digital systems, using industry standard tools
  • Experience in the physical design of complex digital systems, using industry standard tools
  • Experience testing and debugging digital system-on-a-chips
  • Functional modeling experience and logic verification with SystemVerilog, SystemC/C++
  • Experience automating tool flows
  • Experience with embedded design
  • Experience in processor instruction set architecture design
  • Experience in compiler back-end design and customization

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