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Verification Engineer Jobs in Raleigh, NC (NOW HIRING)

Verification SW Engineer

Durham, NC · On-site

$131K/yr

Verification SW Engineer INTRODUCTION The System Validation Group ( SVG ) at Analog Devices is looking for a Software Engineer to develop test suites to validate a growing family of very ...

They are seeking a Verification SW Engineer to develop test suites for validating sophisticated Wireless Battery Management System products and networking products within the Automotive ...

Senior DDR IP Verification Engineer

Raleigh, NC · On-site

$101K - $139K/yr

We are looking for a DDR IP DV Individual Contributor Engineer to join the team. #SCHIE #CSME Responsibilities Position responsibilities will include: * Own or lead verification of one or more ...

Verification SW Engineer INTRODUCTION The System Validation Group ( SVG ) at Analog Devices is looking for a Software Engineer to develop test suites to validate a growing family of very ...

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Verification Engineer information

See Raleigh, NC salary details

$77.8K

$138.6K

$197.8K

How much do verification engineer jobs pay per year?

As of Jun 9, 2026, the average yearly pay for verification engineer in Raleigh, NC is $138,630.00, according to ZipRecruiter salary data. Most workers in this role earn between $132,200.00 and $132,200.00 per year, depending on experience, location, and employer.

What Is a Verification Engineer?

A verification engineer runs tests to ensure products function as expected before they become available to customers. Your job duties as a verification engineer include collaborating with the design team, creating a comprehensive testing process, testing products, providing feedback, and ensuring products are ready on time. The qualifications you need for a career as a verification engineer include a bachelor’s degree in an engineering field, at least two to five years of technical experience, and excellent teamwork skills. You may need Professional Engineer (PE) licensure for some employers.

What are the key skills and qualifications needed to thrive as a Verification Engineer, and why are they important?

To thrive as a Verification Engineer, you need a strong background in digital design, computer engineering, and verification methodologies, typically supported by a degree in electrical or computer engineering. Familiarity with hardware description languages like Verilog or VHDL, simulation tools (e.g., ModelSim, VCS), and verification frameworks such as UVM is essential. Strong analytical thinking, problem-solving abilities, and effective communication are standout soft skills in this role. These competencies ensure the reliable validation of complex hardware designs, reducing errors and improving product quality throughout the development process.

How does a Verification Engineer typically collaborate with design and development teams during a project?

Verification Engineers work closely with hardware and software design teams to ensure that products meet technical specifications and function as intended. They participate in regular design reviews, provide feedback on testability, and develop test plans aligned with design goals. Effective communication and collaboration are essential, as Verification Engineers often need to clarify requirements, report bugs, and suggest design improvements. This cross-functional teamwork helps identify issues early, leading to higher-quality products and more efficient project timelines.

What is the difference between Verification Engineer vs Test Engineer?

AspectVerification EngineerTest Engineer
Primary FocusEnsuring design correctness through simulation and formal methodsExecuting tests on hardware or software to validate functionality
Skills & CertificationsKnowledge of verification tools, scripting, HDL languagesTesting methodologies, scripting, hardware/software knowledge
Work EnvironmentDesign teams, simulation labs, verification environmentsTest labs, hardware setups, software testing environments
Industry UsageElectronics, semiconductor, ASIC/IP developmentElectronics, software, embedded systems

Verification Engineers focus on verifying design correctness through simulation and formal methods, while Test Engineers primarily execute tests on hardware or software to validate functionality. Both roles require technical skills and often overlap, but Verification Engineers are more involved in the design validation process, whereas Test Engineers focus on practical testing and validation in real-world environments.

What is a Verification Engineer?

A Verification Engineer is a professional responsible for ensuring that hardware or software systems meet their design specifications and work as intended. They develop test plans, create test environments, and use various simulation tools to catch bugs and errors before a product goes into production. Verification Engineers play a critical role in the quality assurance process, particularly in industries like semiconductor, electronics, and software development. Their work helps prevent costly design flaws and ensures reliable, high-quality products.
What are the most commonly searched types of Verification Engineer jobs in Raleigh, NC? The most popular types of Verification Engineer jobs in Raleigh, NC are:
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What cities near Raleigh, NC are hiring for Verification Engineer jobs? Cities near Raleigh, NC with the most Verification Engineer job openings:

ASIC Design and Verification Engineer - AI

Analogdevices

Durham, NC • On-site

$131K - $160K/yr

Full-time

Medical, Dental, Vision, Retirement, PTO

Posted 28 days ago


Job description

About Analog Devices

Analog Devices, Inc. (NASDAQ:ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible. Learn more atwww.analog.comand onLinkedInandTwitter (X).

ASIC Design and Verification Engineer - AIThe semiconductor industry is rapidly adopting AI for acceleration
Autonomous multi-agent systems that reason, learn, plan, and execute complex EDA tasks. By automating repetitive, multi-step design tasks and optimizing intricate workflows, agentic AI is the future and will enable engineers to focus on higher-level problems.
For this purpose
ADI is seeking a ASIC Design and Verification Engineer - AI is to spearhead the development and integration of best-in-class AI-driven tools in IC design and verification.

This position is in the Engineering Enablement (EE) group that provides industry-leading tools, methodologies, and support to accelerate product development across the company. You'll be a part of the Systems Verification and Validation (SVV) team within the EE organization in ADI's Vertical Business Units. SVV is responsible for developing, adopting, and supporting tools, methodologies, and solutions across the entire design verification landscape - including Unified Metric-Driven Verification (MDV), System Verilog (SV)/UVM-based methodologies, Mixed-Signal DV, Post-Silicon Validation Shift-Left, Formal Verification, Functional Safety, Security, Portable Stimulus, and Emulation/Prototyping technologies.

A major focus of the group recently has been around deploying and integrating advanced Agentic AI methods to boost productivity in areas of digital architecture, digital design, digital implementation DV and embedded software. This role offers an exciting opportunity to contribute to rapid advancements in a dynamic and fast-evolving field filled with engaging challenges.

About the Role

In this role, you will leverage your knowledge in Integrated Circuit (IC) design and verification with working knowledge of AI/ML to develop, integrate, deploy, and support best-in-class Agentic AI solutions including custom instructions, skills and automation scripts. You will help connect these tools with multiple engineering domains including system architecture, design, verification, and software teams to enhance productivity and quality. This is not an Agentic AI role, though you will use/create agents to accelerate output.

Key Responsibilities

  • Evaluate and integrate Agentic AI tools with industry standard and proprietary tools and workflows for massively accelerating various parts of the IC design and verification lifecycle
  • Develop libraries of custom instructions, skills, and automation scripts for Agentic AI tools
  • Apply machine learning and agentic AI techniques to extend and enhance ADI's EDA tools
  • Connect APIs and SDKs to ADI's design databases
  • Educate users on best practices for using Agentic AI tools, create documentation and deliver training workshops
  • Work closely with digital and analog design engineers, verification experts, and tool developers to identify pain points and integrate AI solutions
  • Evaluate and benchmark emerging AI/ML tools for semiconductor workflows
  • Develop and maintain automation tools to improve verification productivity and debug efficiency
  • Keep abreast of the latest in generative AI and agentic frameworks

Required Qualifications

  • 5 years of experience in the IC design and verification domain
  • Experience with LLM-related techniques: prompt engineering, RAG, vector databases
  • Strong experience with scripting languages (Python, Bash)
  • Strong experience with System Verilog/UVM and C-based test bench development
  • Proficiency with git version control and CI/CD pipelines (GitHub Actions, Jenkins)
  • Strong command-line Linux skills and experience with common Linux utilities
  • Excellent debugging and analytical skills
  • Strong coding and documentation practices
  • Excellent communication skills to work across teams

Preferred Qualifications

  • Knowledge of AI Infrastructure development, including MCP integration
  • API integration experience (REST/GraphQL)
  • Familiarity with cloud platforms (AWS, Azure) and CI/CD practices for ML tools
  • Experience fine-tuning or training LLMs for domain-specific applications
  • Experience with synthesizable RTL development
  • Experience with debugging of RTL and gate simulations
  • Experience with Xcelium and Synopsys tools
  • Proficiency in Formal Verification techniques and tools
  • Experience with coverage-driven verification methodologies
  • Familiarity with low power verification (UPF)

Preferred Education

  • Bachelor's or master's degree in electrical engineering, Computer Engineering, or equivalent experience

For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position - except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) - may have to go through an export licensing review process.

Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.

EEO is the Law: Notice of Applicant Rights Under the Law.

Job Req Type: ExperiencedRequired Travel: Yes, 10% of the timeShift Type: 1st Shift/DaysThe expected wage range for a new hire into this position is $116,960 to $160,820.
  • Actual wage offered may vary depending on work location, experience, education, training, external market data, internal pay equity, or other bona fide factors.

  • This position qualifies for a discretionary performance-based bonus which is based on personal and company factors.

  • This position includes medical, vision and dental coverage, 401k, paid vacation, holidays, and sick time, and other benefits.