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Telecommute Asic Rtl Design Engineer Jobs in Secaucus, NJ

FPGA Design Engineer

Hoboken, NJ ยท On-site

$134K - $185K/yr

FPGA Design Engineer Location: Hoboken, NJ Division : Technology Department: Engineering Reports to ... Develop RTL code for use within multiple projects. Analyze and enhance efficiency, scalability, and ...

FPGA Design Engineer

Hoboken, NJ ยท On-site

$134K - $185K/yr

FPGA Design Engineer Location: Hoboken, NJ Division : Technology Department: Engineering Reports to ... Develop RTL code for use within multiple projects. Analyze and enhance efficiency, scalability, and ...

Hardware Engineer

New York, NY ยท On-site

$135K - $178K/yr

We are looking for a hardware engineer to join our high frequency trading technology team ... Architect and implement FPGA applications (RTL design, synthesis, place & route, timing closure)

Hardware Engineer

New York, NY ยท On-site

$135K - $178K/yr

We are looking for a hardware engineer to join our high frequency trading technology team ... Responsibilities: โ€ข Architect and implement FPGA applications (RTL design, synthesis, place ...

FPGA DESIGN ENGINEER

Warren, NJ ยท On-site

$127K - $176K/yr

Airspan Careers FPGA DESIGN ENGINEER Location: Warren, New Jersey or Plano, TX, Remote possible if ... Develop RTL designs in Verilog/System Verilog , ensuring efficient and high-performance ...

FPGA Engineer (Intern)

Manhattan, NY ยท On-site

$4.3K - $4.8K/wk

FPGA Engineers work closely with business leaders to design and deploy FPGA solutions that help ... Experienced in RTL Design (SystemVerilog preferred). Python, C, Tcl, and Bash a plus. * Experience ...

SmartSoC combines deep silicon engineering expertise with Virtusa's global delivery capabilities ... full ASIC and SoC development lifecycle - from architecture definition and RTL design through ...

SmartSoC combines deep silicon engineering expertise with Virtusa's global delivery capabilities ... full ASIC and SoC development lifecycle - from architecture definition and RTL design through ...

SmartSoC combines deep silicon engineering expertise with Virtusa's global delivery capabilities ... full ASIC and SoC development lifecycle - from architecture definition and RTL design through ...

FPGA Engineer - Intern (US)

Manhattan, NY ยท On-site

$4.5K - $5.8K/wk

FPGA Engineers work closely with business leaders to design and deploy FPGA solutions that help ... Hardware Architecture, RTL Coding, Simulation, Systems Integration, Hardware Validation and Testing ...

Design Verification Engineer

New York, NY ยท On-site

$200K - $400K/yr

The Role As a Design Verification Engineer at Normal, you will verify our own physics-inspired ... Thermodynamic ASIC Verification: Own design verification for Normal's internal silicon: testbench ...

Showing results 21-40

Telecommute Asic Rtl Design Engineer information

See Secaucus, NJ salary details

$95.6K

$152.7K

$205.4K

How much do telecommute asic rtl design engineer jobs pay per year?

As of Aug 12, 2026, the average yearly pay for telecommute asic rtl design engineer in Secaucus, NJ is $152,701.00, according to ZipRecruiter salary data. Most workers in this role earn between $133,700.00 and $183,000.00 per year, depending on experience, location, and employer.

What are some common challenges faced by telecommute ASIC RTL design engineers, and how can they be addressed?

Telecommute ASIC RTL Design Engineers often face challenges like coordinating effectively with remote teams, ensuring version control integrity, and maintaining clear communication on project specifications. These challenges can be mitigated by utilizing robust collaboration tools, adhering to standardized documentation practices, and scheduling regular virtual meetings for design reviews. Additionally, staying proactive in seeking feedback and clarifying requirements helps ensure alignment and prevents costly design iterations.

What are the key skills and qualifications needed to thrive as a telecommute ASIC RTL design engineer?

To thrive as a Telecommute ASIC RTL Design Engineer, you need a strong background in digital logic design, proficiency in hardware description languages like Verilog or VHDL, and typically a degree in electrical or computer engineering. Familiarity with EDA tools such as Synopsys or Cadence, as well as experience with simulation, synthesis, and debugging environments, is essential. Strong problem-solving abilities, attention to detail, and effective communication skills are crucial for collaborating remotely and ensuring design accuracy. These skills are vital to deliver complex, high-performance ASICs on schedule while working efficiently in a remote setting.

What is a telecommute ASIC RTL design engineer?

A Telecommute ASIC RTL Design Engineer is a professional who specializes in designing digital circuits at the Register Transfer Level (RTL) for Application-Specific Integrated Circuits (ASICs), while working remotely. They use hardware description languages like Verilog or VHDL to create and verify circuit designs tailored to specific applications. Their responsibilities often include developing, simulating, and optimizing digital logic, collaborating with cross-functional teams, and ensuring that the final silicon meets design specifications. Since the role is telecommute, all work is performed from a remote location using digital communication and collaboration tools.

What is the difference between Telecommute Asic Rtl Design Engineer vs Telecommute Digital IC Design Engineer?

AspectTelecommute Asic Rtl Design EngineerTelecommute Digital IC Design Engineer
CredentialsBachelor's or Master's in Electrical Engineering or Computer Engineering; experience with RTL codingBachelor's or Master's in Electrical Engineering or Computer Engineering; experience with digital circuit design
Work EnvironmentRemote, primarily designing RTL code for ASICsRemote, focusing on digital IC architecture and design
Industry UsageCommon in semiconductor and electronics companies

Both roles often require similar educational backgrounds and work remotely in the semiconductor industry. The main difference lies in their focus: RTL Design Engineers concentrate on writing RTL code for ASICs, while Digital IC Design Engineers work on broader digital circuit architecture. Candidates should choose based on their specific skills and career interests in digital design or RTL coding.

FPGA Design Engineer

QCi

Hoboken, NJ โ€ข On-site

$134K - $185K/yr

Full-time

Re-posted 19 days ago


Job description

FPGA Design Engineer
Job Description
Location: Hoboken, NJ
Division: Technology
Department: Engineering
Reports to: FPGA Engineering Manager
About Us:
Quantum Computing Inc. (QCi) (Nasdaq: QUBT) is an innovative, integrated photonics company that provides accessible and affordable quantum machines to the world today. QCi products are designed to operate at room temperature and low power at an affordable cost. The Company's portfolio of core technology and products offer unique capabilities in the areas of high-performance computing, artificial intelligence, cyber security as well as remote sensing applications.
Position Description:
We are seeking a new FPGA Design Engineer to join our Hardware team. You will work directly with a diverse team of experts including quantum scientists, optical, nanofabrication, hardware, FPGA, and embedded engineers. Together, you'll develop prototypes and photonic-based products across multiple application areas including quantum computing, quantum intelligence, quantum remote sensing, quantum bio-imaging, and quantum cybersecurity.
This is a unique opportunity to participate in the architecture design of multiple new FPGA projects in the pipeline, and to work closely with some of the brightest scientists and engineers in lithium niobate, photonic-based quantum technologies. If you enjoy the excitement of solving complex problems, creating realistic application quantum benefits, and working in a fast-paced, innovative environment, this could be the perfect role for you!
Duties and Responsibilities:
  • Develop,Design and implement real-time computational and digital algorithms and systems using FPGAs.
  • Develop RTL code for use within multiple projects. Analyze and enhance efficiency, scalability, and stability of the system resources .
  • Integrate multiple FPGAs and off-the-shelf hardware devices into our next generation quantum device architecture.
  • Collaborate with cross-disciplinary teams to design and customize quantum systems with customers requirements/feedbacks
  • Design, implement, simulate, and test the operation of the FPGA logic and systems
  • Document architectures, test results in addition to source code

Required Skills and Experience:
  • 3-5 years of industrial experience in FPGA design
  • Practical experience using HLS in FPGA design would be a HUGE plus.
  • Expertise in Verilog/System Verilog
  • Proficiency in RTL simulation (ModelSim,xSim etc.), and building testbenches to verify your design.
  • Experience with Altera(Intel) or Xilinx(AMD) FPGAs and associated development tools
  • Experience working with lab equipment such as oscilloscopes and logic analyzers.
  • Experience/familarity in/with digital hardware circuit design is preferred.
  • Excellent communication skills (written and verbal)
  • Collaborative teammate who is supportive of co-workers and contributes to problem solving
  • Ability to work well in a fast-paced professional office environment and manage simultaneous tasks and deliverables
  • Bachelor of Science in Electrical Engineering or Computer Engineering Required
  • Masters of Science in Electrical Engineering or Computer Engineering Preferred