The Brain Interfaces Soc Department delivers chip architecture and silicon implementation of neural recording and stimulation system-on-chip (SoC) for high-bandwidth brain-machine interface ...
The Brain Interfaces Soc Department delivers chip architecture and silicon implementation of neural recording and stimulation system-on-chip (SoC) for high-bandwidth brain-machine interface ...
As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and ...
As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and ...
Adv ASIC FPGA Eng 3
Manassas, VA · On-site
$62 - $66.94/hr
This role requires expertise in FPGA development, digital circuit design, System-on-Chip (SoC) architectures, verification and validation, embedded processing, and defense electronics , along with ...
Adv ASIC FPGA Eng 3
Manassas, VA · On-site
$62 - $66.94/hr
This role requires expertise in FPGA development, digital circuit design, System-on-Chip (SoC) architectures, verification and validation, embedded processing, and defense electronics , along with ...
Extensive experience with space processing architecture encompassing micro-controllers, processors, system-on-chip and graphic processing unit devices. * Deep knowledge of embedded systems, operating ...
Extensive experience with space processing architecture encompassing micro-controllers, processors, system-on-chip and graphic processing unit devices. * Deep knowledge of embedded systems, operating ...
SoC Timing (Static Timing Analysis/STA) Engineer, HBM
Richardson, TX · On-site
$123K - $127K/yr
Proven ability to develop and manage complex hierarchical SDC constraints for large systems on chip with multiple clock and power domains. * Proficiency in Python and/or Tcl scripting for timing flow ...
SoC Timing (Static Timing Analysis/STA) Engineer, HBM
Richardson, TX · On-site
$123K - $127K/yr
Proven ability to develop and manage complex hierarchical SDC constraints for large systems on chip with multiple clock and power domains. * Proficiency in Python and/or Tcl scripting for timing flow ...
Proven ability to develop and manage complex hierarchical SDC constraints for large systems on chip with multiple clock and power domains. * Proficiency in Python and/or Tcl scripting for timing flow ...
Proven ability to develop and manage complex hierarchical SDC constraints for large systems on chip with multiple clock and power domains. * Proficiency in Python and/or Tcl scripting for timing flow ...
System Infrastructure Developer
Austin, TX · On-site
As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and ...
System Infrastructure Developer
Austin, TX · On-site
As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and ...
System Infrastructure Developer
Austin, TX · On-site
As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and ...
System Infrastructure Developer
Austin, TX · On-site
As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and ...
Senior System Software Engineer
San Francisco, CA · On-site
$162K - $288K/yr
Familiarity with ARM System-on-Chip (SOC) architecture * Experience developing bare-metal firmware for microcontrollers * Ability to use common lab equipment (eg, logic analyzers) to debug low-level ...
Senior System Software Engineer
San Francisco, CA · On-site
$162K - $288K/yr
Familiarity with ARM System-on-Chip (SOC) architecture * Experience developing bare-metal firmware for microcontrollers * Ability to use common lab equipment (eg, logic analyzers) to debug low-level ...
... System-on-Chips (SoC). We are seeking an energetic and highly motivated SoC performance engineer to drive development of our on-chip communication interconnect and memory Quality-of-Service features.
... System-on-Chips (SoC). We are seeking an energetic and highly motivated SoC performance engineer to drive development of our on-chip communication interconnect and memory Quality-of-Service features.
As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and ...
As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and ...
As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and ...
As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and ...
... system-on-chips (SoCs). You will ensure Apple products and services can seamlessly and efficiently ... with common on-chip bus protocols such as AMBA (AXI, AHB, APB) Experience in front-end ...
... system-on-chips (SoCs). You will ensure Apple products and services can seamlessly and efficiently ... with common on-chip bus protocols such as AMBA (AXI, AHB, APB) Experience in front-end ...
... system-on-chips (SoCs). You will ensure Apple products and services can seamlessly and efficiently ... with common on-chip bus protocols such as AMBA (AXI, AHB, APB) Experience in front-end ...
... system-on-chips (SoCs). You will ensure Apple products and services can seamlessly and efficiently ... with common on-chip bus protocols such as AMBA (AXI, AHB, APB) Experience in front-end ...
... System-on-Chips (SoC). We are seeking an energetic and highly motivated SoC performance engineer to drive development of our on-chip communication interconnect and memory Quality-of-Service features.
... System-on-Chips (SoC). We are seeking an energetic and highly motivated SoC performance engineer to drive development of our on-chip communication interconnect and memory Quality-of-Service features.
... system-on-chips (SoCs). You will ensure Apple products and services can seamlessly and efficiently ... with common on-chip bus protocols such as AMBA (AXI, AHB, APB) Experience in front-end ...
... system-on-chips (SoCs). You will ensure Apple products and services can seamlessly and efficiently ... with common on-chip bus protocols such as AMBA (AXI, AHB, APB) Experience in front-end ...
Build out the software ecosystem supporting next-generation hardware platforms powered by cutting-edge System-on-Chip devices. * Help secure our embedded system devices. * Develop and maintain ...
Build out the software ecosystem supporting next-generation hardware platforms powered by cutting-edge System-on-Chip devices. * Help secure our embedded system devices. * Develop and maintain ...
DFT Design Engineer, Machine Learning Acceleration
Austin, TX · On-site
$99K - $135K/yr
Custom SoCs (System on Chip) are at the heart of AWS Machine Learning servers. As a member of the Cloud-Scale Machine Learning Acceleration team, you'll be responsible for designing and optimizing ...
DFT Design Engineer, Machine Learning Acceleration
Austin, TX · On-site
$99K - $135K/yr
Custom SoCs (System on Chip) are at the heart of AWS Machine Learning servers. As a member of the Cloud-Scale Machine Learning Acceleration team, you'll be responsible for designing and optimizing ...
... large system-on-chip (SoC) designs used in next-generation ultrasound imaging platforms. As a senior member of the engineering team, you will drive verification methodology, automation, and ...
... large system-on-chip (SoC) designs used in next-generation ultrasound imaging platforms. As a senior member of the engineering team, you will drive verification methodology, automation, and ...
Deliver system-on-chip (SoC) Static Timing Analysis. * Define SoC timing signoff process corners, derates, uncertainties and their tradeoffs. * Drive clock tree Jitter and implementation for SoCs to ...
Deliver system-on-chip (SoC) Static Timing Analysis. * Define SoC timing signoff process corners, derates, uncertainties and their tradeoffs. * Drive clock tree Jitter and implementation for SoCs to ...
System On Chip information
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$14.18 - $16.96
4% of jobs
$16.96 - $19.73
13% of jobs
$19.73 - $22.51
6% of jobs
$22.60 is the 25th percentile. Wages below this are outliers.
$22.51 - $25.28
49% of jobs
$26.15 is the 75th percentile. Wages above this are outliers.
$25.28 - $28.06
9% of jobs
$28.06 - $30.83
9% of jobs
$30.83 - $33.61
0% of jobs
$33.61 - $36.39
0% of jobs
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1% of jobs
$39.16 - $41.94
7% of jobs
$41.94 - $44.71
2% of jobs
$14
$27
$44
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Job description
Team Description:Â
The Brain Interfaces Soc Department delivers chip architecture and silicon implementation of neural recording and stimulation system-on-chip (SoC) for high-bandwidth brain-machine interface applications. We have crafted a team of exceptional engineers whose mission is to push the frontiers of what is possible today and define the future.Â
Job Description & Responsibilities:Â
Our Digital IC Design Engineer will be responsible for delivering micro-architecture and register-transfer level (RTL) implementation of digital IPs and systems with a focus in high-throughput low-power digital signal processor (DSP) and general-purpose hardware accelerators towards realizing state-of-the-art brain-computer interfaces. Relevant product development experience in micro-architecture design for low-power processors, on-chip bus and network interfaces, audio/video compression processors, AI/ML accelerators, and communication PHY/MAC will be preferred.
- Micro-architecture design and RTL implementation of:Â
- Low-power digital signal processors
- Low-power general-purpose hardware accelerators
- Low-power graphics processing units
- Low-power radio MAC/PHY
- Low-power serial link MAC/PHY
- Design and optimization of hardware/software interface with firmware engineers
- Application-specific architecture optimization including:
- Complex system modeling for energy and performance benchmarks
- Workload analysis and modeling
- Energy/performance profiling and analysis
- Leveraging architecture-level design trade-offs with process technology and workload type
- Balancing cost and performance under manufacturing process variationÂ
- Collaboration on silicon bring-up tests with verification engineersÂ
Required Qualifications:
- Bachelor of Science (B.S.) degree in Electrical Engineering and/or Computer Science or a related field, or equivalent experience
- Evidence of exceptional ability in electrical engineering, computer science, or computer engineering
- 5+ years of experience in digital design
- Expertise in SystemVerilog, C/C++, Python
- Experience working on complex digital systems from architecture, microarchitecture, and RTL, using industry standard tools
- Experience in designing digital signal processing pipelines, from algorithm to RTL
Preferred Qualifications:Â
- Experience in architecture optimization with process technology customization
- Experience in the verification of complex digital systems, using industry standard tools
- Experience in the physical design of complex digital systems, using industry standard tools
- Experience testing and debugging digital system-on-a-chips
- Functional modeling experience and logic verification with SystemVerilog, SystemC/C++
- Experience automating tool flows
- Experience with embedded design
- Experience in processor instruction set architecture design
- Experience in compiler back-end design and customization
About NEURALINK
Sourced by ZipRecruiter
Industry
Biotechnology research and development
Company size
201 - 500 Employees
Headquarters location
San Francisco, CA, US
Year founded
2016