Memory Circuit Design Engineer
$190K - $269K/yr
... SRAM and Cache design. Preferred Qualifications: * Experience in low-power implementation techniques and memory design. * Familiarity with circuit and layout trade-offs for optimized design.
$190K - $269K/yr
... SRAM and Cache design. Preferred Qualifications: * Experience in low-power implementation techniques and memory design. * Familiarity with circuit and layout trade-offs for optimized design.
$190K - $269K/yr
... SRAM and Cache design. Preferred Qualifications: * Experience in low-power implementation techniques and memory design. * Familiarity with circuit and layout trade-offs for optimized design.
Austin, TX · On-site
$190K - $269K/yr
... SRAM and Cache design. Preferred Qualifications: * Experience in low-power implementation techniques and memory design. * Familiarity with circuit and layout trade-offs for optimized design.
Austin, TX · On-site
$190K - $269K/yr
... SRAM and Cache design. Preferred Qualifications: * Experience in low-power implementation techniques and memory design. * Familiarity with circuit and layout trade-offs for optimized design.
$181K - $318K/yr
We have an extraordinary opportunity for Compiler Circuit Design Engineers. This is a highly ... SRAM, register files and latch arrays to enable high performance and low power design - Have as ...
$181K - $318K/yr
We have an extraordinary opportunity for Compiler Circuit Design Engineers. This is a highly ... SRAM, register files and latch arrays to enable high performance and low power design - Have as ...
$181K - $318K/yr
We have an extraordinary opportunity for Compiler Circuit Design Engineers. This is a highly ... SRAM, register files and latch arrays to enable high performance and low power design - Have as ...
$181K - $318K/yr
We have an extraordinary opportunity for Compiler Circuit Design Engineers. This is a highly ... SRAM, register files and latch arrays to enable high performance and low power design - Have as ...
$122K - $232K/yr
Design, characterization, and verification ofcustom memory circuits such as SRAM, Register Files or ROM * Design trade-offs between power, performance, and area (PPA) * Custom digital circuit design ...
$122K - $232K/yr
Design, characterization, and verification ofcustom memory circuits such as SRAM, Register Files or ROM * Design trade-offs between power, performance, and area (PPA) * Custom digital circuit design ...
Hillsboro, OR · On-site
$122K - $232K/yr
Design, characterization, and verification of custom memory circuits such as SRAM, Register Files or ROM * Design trade-offs between power, performance, and area (PPA) * Custom digital circuit design ...
Hillsboro, OR · On-site
$122K - $232K/yr
Design, characterization, and verification of custom memory circuits such as SRAM, Register Files or ROM * Design trade-offs between power, performance, and area (PPA) * Custom digital circuit design ...
Santa Clara, CA · On-site
$122K - $232K/yr
Memory array/IP design, memory circuit innovation, test-chip design. * Pre-Si verification, post-Si ... Design, characterization, and verification of custom memory circuits such as SRAM, Register Files ...
Santa Clara, CA · On-site
$122K - $232K/yr
Memory array/IP design, memory circuit innovation, test-chip design. * Pre-Si verification, post-Si ... Design, characterization, and verification of custom memory circuits such as SRAM, Register Files ...
Hillsboro, OR · On-site
$122K - $232K/yr
Memory array/IP design, memory circuit innovation, test-chip design. * Pre-Si verification, post-Si ... Design, characterization, and verification of custom memory circuits such as SRAM, Register Files ...
Hillsboro, OR · On-site
$122K - $232K/yr
Memory array/IP design, memory circuit innovation, test-chip design. * Pre-Si verification, post-Si ... Design, characterization, and verification of custom memory circuits such as SRAM, Register Files ...
We are now hiring for a Circuit Design Engineer for Standard Cell and/or ROM. NVIDIA has been ... SRAM. * Strong proficiency in scripting language, such as, Perl, Tcl, Make, and automation methods ...
We are now hiring for a Circuit Design Engineer for Standard Cell and/or ROM. NVIDIA has been ... SRAM. * Strong proficiency in scripting language, such as, Perl, Tcl, Make, and automation methods ...
Troy, MI · On-site
Good understanding of SRAM architecture, Critical Path Modelling, Full Cut Analysis and Monte Carlo Simulations. * Exposure to full embedded memory design flow: Architecture, circuit design, physical ...
Quick apply
Troy, MI · On-site
Good understanding of SRAM architecture, Critical Path Modelling, Full Cut Analysis and Monte Carlo Simulations. * Exposure to full embedded memory design flow: Architecture, circuit design, physical ...
We are now hiring for a Circuit Design Engineer for Standard Cell and/or ROM. NVIDIA has been ... SRAM. * Strong proficiency in scripting language, such as, Perl, Tcl, Make, and automation methods ...
We are now hiring for a Circuit Design Engineer for Standard Cell and/or ROM. NVIDIA has been ... SRAM. * Strong proficiency in scripting language, such as, Perl, Tcl, Make, and automation methods ...
Work closely with SRAM circuit designers to implement PPA (Power, Performance, Area) data to create design kits. * Create systems to optimize SRAM memory solutions for SoC designers. * Develop new ...
Work closely with SRAM circuit designers to implement PPA (Power, Performance, Area) data to create design kits. * Create systems to optimize SRAM memory solutions for SoC designers. * Develop new ...
Work closely with SRAM circuit designers to implement PPA (Power, Performance, Area) data to create design kits. * Create systems to optimize SRAM memory solutions for SoC designers. * Develop new ...
Work closely with SRAM circuit designers to implement PPA (Power, Performance, Area) data to create design kits. * Create systems to optimize SRAM memory solutions for SoC designers. * Develop new ...
Santa Clara, CA · On-site
$122K - $168K/yr
We are now hiring for a Senior Circuit Design Engineer for Standard Cell and/or ROM. NVIDIA has ... SRAM. * Strong proficiency in scripting language, such as, Perl, Tcl, Make, and automation methods ...
Santa Clara, CA · On-site
$122K - $168K/yr
We are now hiring for a Senior Circuit Design Engineer for Standard Cell and/or ROM. NVIDIA has ... SRAM. * Strong proficiency in scripting language, such as, Perl, Tcl, Make, and automation methods ...
Santa Clara, CA · On-site
$122K - $168K/yr
We are now hiring for a Senior Circuit Design Engineer for Standard Cell and/or ROM. NVIDIA has ... SRAM. * Strong proficiency in scripting language, such as, Perl, Tcl, Make, and automation methods ...
Santa Clara, CA · On-site
$122K - $168K/yr
We are now hiring for a Senior Circuit Design Engineer for Standard Cell and/or ROM. NVIDIA has ... SRAM. * Strong proficiency in scripting language, such as, Perl, Tcl, Make, and automation methods ...
Austin, TX · On-site
As a CPU SRAM Design Engineer, you will design, improve, and analyze digital circuits for memories ... Experience with circuit simulation and monte carlo analysis. * Experience with static timing ...
Austin, TX · On-site
As a CPU SRAM Design Engineer, you will design, improve, and analyze digital circuits for memories ... Experience with circuit simulation and monte carlo analysis. * Experience with static timing ...
Pioneer Circuit Innovation: Conduct groundbreaking research and development, evaluating the Power ... SRAM, RRAM, MRAM, PCRAM. * Memory Macro Design: Sense amplifiers, write circuitry, LDO, charge ...
Pioneer Circuit Innovation: Conduct groundbreaking research and development, evaluating the Power ... SRAM, RRAM, MRAM, PCRAM. * Memory Macro Design: Sense amplifiers, write circuitry, LDO, charge ...
Pioneer Circuit Innovation: Conduct groundbreaking research and development, evaluating the Power ... SRAM, RRAM, MRAM, PCRAM. * Memory Macro Design: Sense amplifiers, write circuitry, LDO, charge ...
Pioneer Circuit Innovation: Conduct groundbreaking research and development, evaluating the Power ... SRAM, RRAM, MRAM, PCRAM. * Memory Macro Design: Sense amplifiers, write circuitry, LDO, charge ...
As a CPU SRAM Design Engineer, you will design, improve, and analyze digital circuits for memories ... Experience with circuit simulation and monte carlo analysis. * Experience with static timing ...
As a CPU SRAM Design Engineer, you will design, improve, and analyze digital circuits for memories ... Experience with circuit simulation and monte carlo analysis. * Experience with static timing ...
As a Senior Circuit Design Engineer, you will leverage TSMC's leading process technology and design ... Lead efforts in Power, Performance, and Area (PPA) optimization for custom SRAM circuits to align ...
As a Senior Circuit Design Engineer, you will leverage TSMC's leading process technology and design ... Lead efforts in Power, Performance, and Area (PPA) optimization for custom SRAM circuits to align ...
$59.5K - $67.7K
18% of jobs
$67.7K - $75.9K
0% of jobs
$82.8K is the 25th percentile. Wages below this are outliers.
$75.9K - $84K
8% of jobs
$84K - $92.2K
2% of jobs
$92.2K - $100.4K
4% of jobs
$100.4K - $108.6K
11% of jobs
The median wage is $114.5K / yr.
$108.6K - $116.8K
9% of jobs
$116.8K - $125K
6% of jobs
$131.9K is the 75th percentile. Wages above this are outliers.
$125K - $133.1K
19% of jobs
$133.1K - $141.3K
11% of jobs
$141.3K - $149.5K
12% of jobs
$59.5K
$110.8K
$149.5K
An SRAM Circuit Design job involves designing and optimizing Static Random-Access Memory (SRAM) circuits used in processors, GPUs, and other digital systems. Engineers in this role focus on key aspects such as transistor-level design, power optimization, performance tuning, and reliability enhancements. They work with layout engineers and verification teams to ensure the memory meets required specifications and fabrication constraints. Additionally, they may analyze process variations and implement techniques to improve yield and robustness.
As an SRAM Circuit Design engineer, your day usually involves developing and simulating circuit schematics, running layout and verification checks, and collaborating with design verification teams to ensure functionality and reliability. You’ll often participate in technical meetings to review design progress, discuss challenges, and align with layout, process, and systems engineers. The role frequently requires iterative problem-solving and balancing multiple project deadlines. You'll also have opportunities to contribute to design improvements, learn from experienced peers, and advance your skills in advanced memory technology and SoC design methodologies.
To thrive as an SRAM Circuit Design engineer, you typically need a strong background in electrical engineering, CMOS circuit design fundamentals, and semiconductor physics, often supported by a relevant degree. Experience with EDA tools such as Cadence, Synopsys, or Mentor Graphics, and familiarity with simulation and verification methodologies are essential. Strong problem-solving abilities, attention to detail, and effective teamwork and communication skills help you excel in collaborating with cross-functional teams. These skills and qualities are crucial for designing reliable, high-performance SRAM circuits that meet project specifications and industry standards.

$190K - $269K/yr
Full-time
Medical, Retirement, PTO
Posted 6 days ago
8.8
Based on 143 frontline employees who took The Breakroom Quiz
8th of 139 rated electronics manufacturers
The CPU Circuit Technology team is looking for a highly motivated and experienced individual to join our team as a Memory Circuit Design Engineer. In this role, you will be responsible for designing, developing, and building full-custom as well as compiler-based SRAMs, Large Signal Arrays (custom multi-ported register file), ROMs, custom memories, digital circuits and Caches for Intel CPUs and SOCs. You will be partnering with and leveraging domain experts across various areas of technology development to develop and deliver high-quality industry-leading memory technology collaterals and to drive circuit innovations that enable next generation high-performance, high-density, low-power embedded memory designs on advanced CMOS process technologies for Intel CPU and SOCs.
This will be a fast-paced dynamic environment where you will work in the high performance, low power CPU design team on a wide spectrum of circuit activities including, but may not be limited to:
Technical readiness, memory circuit design, characterization and simulations.
Cache design, critical path simulations and design custom blocks.
Memory path-finding activities and power, performance and area (PPA) optimization.
Memory bit-cell and complex periphery IC design and automation.
Memory array/IP design, memory circuit innovation.
Methodology definition tasks as well as executing to project schedules.
Qualifications:You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
Minimum Qualifications:
Preferred Qualifications:
Help shape the future of technology and join a team that's driving innovation at the forefront of CPU design. Apply now to make a meaningful impact at Intel.
Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Texas, AustinAdditional Locations:Business group:Intel makes possible the most amazing experiences of the future. You may know us for our processors. But we do so much more. Intel invents at the boundaries of technology to make amazing experiences possible for business and society, and for every person on Earth. Harnessing the capability of the cloud, the ubiquity of the Internet of Things, the latest advances in memory and programmable solutions, and the promise of always-on 5G connectivity, Intel is disrupting industries and solving global challenges. Leading on policy, diversity, inclusion, education and sustainability, we create value for our stockholders, customers, and society.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $190,610.00-269,100.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.Sourced by ZipRecruiter
Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth
Manufacturing
10,000+ Employees
Santa Clara, CA, US
1968