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Sram Circuit Design Engineer Jobs (NOW HIRING)

Circuit Design Engineer Client: Defense-Aerospace Hourly Rate: up to $71/hr (W2, non-benefited) Length: 1-year contract Location: Orlando, FL - Hybrid Shift: 4x10, 1st Shift Clearance: Due to nature ...

$116 - $190/hr

Circuit Design Engineer - New College Grad 2026 page is loaded## Circuit Design Engineer - New ... SRAM.* Strong proficiency in scripting language, such as, Perl, Tcl, Make, and automation methods ...

Circuit Design Engineer Client: Defense-Aerospace Hourly Rate: up to $71/hr (W2, non-benefited) Length: 1-year contract Location: Orlando, FL - Hybrid Shift: 4x10, 1st Shift Clearance: Due to nature ...

As a Custom Design Automation engineer for digital design team, you will perform the following ... Define and develop QA checks to verify EDA views of SRAM and register files. * Collaborate with ...

Design, characterization, and verification of custom memory circuits such as SRAM, Register Files ... Custom digital circuit design, simulation, layout design, and verification. * Knowledge of EDA ...

Design, characterization, and verification of custom memory circuits such as SRAM, Register Files ... Custom digital circuit design, simulation, layout design, and verification. * Knowledge of EDA ...

Design, characterization, and verification of custom memory circuits such as SRAM, Register Files ... Custom digital circuit design, simulation, layout design, and verification. * Knowledge of EDA ...

Design, characterization, and verification of custom memory circuits such as SRAM, Register Files ... Custom digital circuit design, simulation, layout design, and verification. * Knowledge of EDA ...

Do you want to utilize your engineering background to make big things happen? Can you influence ... of SRAM and register files. - Collaborate with design and CAD team to optimize design flows and ...

DRAM Design Engineer

Boise, ID · On-site

$80 - $100/hr

Exposure to memory design (DRAM, NAND, SRAM) or high‑speed circuit design * Experience with layout tools and physical design methodologies * Knowledge of scripting or programming (e.g., Python, TCL ...

We have an extraordinary opportunity for Circuit Design Engineering Lead. In this highly visible role, you will be at the heart of a processor design effort, leading custom digital circuits team and ...

Typically requires minimum of 2 to 5 years of experience in Memory Design with mainstream SRAM ... Architecture, circuit design, physical implementation, compiler automation, characterization ...

Circuit Design Engineer Client: Defense-Aerospace Hourly Rate: up to $71/hr (W2, non-benefited) Length: 1-year contract Location: Orlando, FL - Hybrid Shift: 4x10, 1st Shift Clearance: Due to the ...

Circuit Design Engineer Client: Defense-Aerospace Hourly Rate: up to $71/hr (W2, non-benefited) Length: 1-year contract Location: Orlando, FL - Hybrid Shift: 4x10, 1st Shift Clearance: Due to the ...

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Sram Circuit Design Engineer information

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$59.5K

$110.8K

$149.5K

How much do sram circuit design engineer jobs pay per year?

As of Sep 3, 2026, the average yearly pay for sram circuit design engineer in the United States is $110,795.00, according to ZipRecruiter salary data. Most workers in this role earn between $83,500.00 and $132,500.00 per year, depending on experience, location, and employer.

What does a SRAM circuit design engineer do?

A SRAM Circuit Design Engineer is responsible for designing Static Random-Access Memory (SRAM) circuits used in various electronic devices such as processors and memory modules. Their work involves developing circuit architectures, performing simulations, and optimizing designs for speed, power, and reliability. They collaborate with layout engineers, verification teams, and manufacturing groups to ensure the SRAM functions correctly and efficiently in silicon. This role requires a strong understanding of CMOS technology, circuit analysis, and semiconductor fabrication processes.

What are the key skills and qualifications needed to thrive as an SRAM circuit design engineer?

To thrive as an SRAM Circuit Design Engineer, you need a solid background in electrical engineering, semiconductor physics, and experience with digital and analog circuit design, typically supported by a relevant degree. Proficiency with EDA tools like Cadence, Synopsys, and Mentor Graphics, as well as familiarity with simulation, verification, and layout tools, is essential. Attention to detail, problem-solving skills, and the ability to communicate complex ideas clearly help engineers excel in collaborative and fast-paced environments. These skills are crucial for creating reliable, high-performance SRAM circuits that meet stringent power, area, and timing requirements in advanced chip designs.

What are some common challenges faced by SRAM circuit design engineers during the development and verification process?

SRAM Circuit Design Engineers often encounter challenges such as balancing power, performance, and area (PPA) requirements while ensuring the memory cell's stability and reliability. Debugging issues related to leakage currents, process variations, and read/write margins is also frequent, requiring close collaboration with layout and verification teams. Additionally, engineers must stay up-to-date with evolving technology nodes and adapt their designs to meet stringent timing and yield goals. Effective communication with cross-functional teams is essential to address these complexities and deliver robust SRAM solutions.

What is the difference between Sram Circuit Design Engineer vs Digital Circuit Design Engineer?

AspectSram Circuit Design EngineerDigital Circuit Design Engineer
Required CredentialsBachelor's or Master's in Electrical Engineering, specialized in memory designBachelor's or Master's in Electrical Engineering or Computer Engineering
Work EnvironmentSemiconductor companies, memory chip manufacturersIntegrated circuit design firms, electronics companies
Industry UsageMemory and storage device industryGeneral digital electronics and integrated circuit industry

While both roles involve digital circuit design, a Sram Circuit Design Engineer specializes in designing SRAM memory cells and related circuitry, focusing on memory performance and stability. In contrast, a Digital Circuit Design Engineer works on a broader range of digital logic circuits, including processors, controllers, and other digital components. The roles share similar educational backgrounds and work environments but differ in their specific focus areas within digital electronics.

More about Sram Circuit Design Engineer jobs

What cities are hiring for Sram Circuit Design Engineer jobs?

Cities with the most Sram Circuit Design Engineer job openings:

Infographic showing various Sram Circuit Design Engineer job openings in the United States as of August 2026, with employment types broken down into 90% Full Time, 7% Part Time, and 3% Contract. Highlights an 85% Physical, 4% Hybrid, and 11% Remote job distribution, with an average salary of $110,795 per year, or $53.3 per hour.

Memory Circuit Design Engineer

Intel Corporation

Hillsboro, OR • On-site

$122.44 - $232.19/hr

Other

Medical, Retirement, PTO

Re-posted 24 days ago


Intel rating

8.7

Company rating: 8.7 out of 10

Based on 147 frontline employees who took The Breakroom Quiz

18th of 161 rated electronics manufacturers


Job description

## Memory Circuit Design EngineerApplylocations: US, Oregon, Hillsboro: US, California, Santa Clara: US, Texas, Austin: US, Arizona, Phoenixtime type: Full timeposted on: Posted Todayjob requisition id: JR0285104# **Job Details:**## Job Description:The world is transforming - and so is Intel. Intel is a company of bold and curious inventors and problem solvers who create some of the most astounding technology advancements and experiences in the world. With a legacy of relentless innovation and a commitment to bring smart, connected devices to every person on Earth, our diverse and brilliant teams are continually searching for tomorrow's technology and revel in the challenge that changing the world for the better brings. We work every single day to design and manufacture silicon products that empower people's digital lives. Come join us and do something wonderful.The Advanced Design (AD) team is part of Intel's larger Design Technology Platform (DTP) Organization and is focused on pathfinding and development of advanced memory technology. These circuits enable best-in-class memory collateral, IP and innovative product design across all generations of Intel process technology. At Intel, DTP is one of the key pillars enabling Intel to deliver winning products in the marketplace. Your work will directly enable Intel's internal and external customers to get to the market faster with products that include high-performance, high-density, low-power memory at the leading edge of the technology curve and implemented in Intel's advanced CMOS process technologies.You will be partnering with and leveraging domain experts across various areas of technology development, EDA vendors and product design teams to develop and deliver high-quality industry-leading memory technology collaterals and to drive circuit innovations that enable next generation high-performance, high-density, low-power embedded memory designs on Intel advanced CMOS process technologies. In this position your responsibilities will include, but may not be limited to:* Memory pathfinding activities and power, performance and area (PPA) optimization through design technology co-optimization (DTCO) and product design enablement.* Memory bit-cell and complex periphery IC layout and automation.* Memory array/IP design, memory circuit innovation, test-chip design.* Pre-Si verification, post-Si validation and debugging to enable yield and parametric tracking/ramp.## **Qualifications:**You must possess the minimum qualifications listed below to interview for this position. Preferred qualifications are not required but may work to your advantage during the interview process. **Minimum Qualifications:** Master degree in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering, or a related discipline, including 4+ years of professional experience gained through either internships or full-time employment Or a PhD in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering, or a related discipline. **Technical Experience:*** Design, characterization, and verification of custom memory circuits such as SRAM, Register Files or ROM.* Design trade-offs between power, performance, and area (PPA).* Custom digital circuit design, simulation, layout design, and verification.* Knowledge of EDA tools used for custom digital and memory circuit design.**Preferred Qualifications:*** PhD with 1-2 years of professional experience gained through either internships or full-time employment.* Design technology co-optimization (DTCO).* Post-Si validation experience.* Knowledge of the CMOS ASIC design flow.## Job Type:Experienced Hire## Shift:Shift 1 (United States of America)## Primary Location:US, Oregon, Hillsboro## Additional Locations:US, Arizona, Phoenix, US, California, Santa Clara, US, Texas, Austin## Business group:Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures, and assembly/test packages the compute devices to improve the lives of every person on Earth.## Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.## ## Position of TrustN/A## BenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.Annual Salary Range for jobs which could be performed in the US: $122,440.00-232,190.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.**Work Model for this Role**This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. \* Job posting details (such as work model, location or time type) are subject to change.\*ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter. #J-18808-Ljbffr

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About Intel

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Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth

Industry

Manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

Year founded

1968