People come to work at Microchip because we help design the technology that runs the world. They ... Knowledge and exposure to complete SOC RTL to GDS to silicon release flow. Required Education: * BS ...
People come to work at Microchip because we help design the technology that runs the world. They ... Knowledge and exposure to complete SOC RTL to GDS to silicon release flow. Required Education: * BS ...
People come to work at Microchip because we help design the technology that runs the world. They ... Knowledge and exposure to complete SOC RTL to GDS to silicon release flow. Required Education: * BS ...
People come to work at Microchip because we help design the technology that runs the world. They ... Knowledge and exposure to complete SOC RTL to GDS to silicon release flow. Required Education: * BS ...
People come to work at Microchip because we help design the technology that runs the world. They ... Knowledge and exposure to complete SOC RTL to GDS to silicon release flow. Required Education: * BS ...
People come to work at Microchip because we help design the technology that runs the world. They ... Knowledge and exposure to complete SOC RTL to GDS to silicon release flow. Required Education: * BS ...
As a Staff Design Engineer, your job will entail the following: * Own design planning and ... flows for SoC IO validation * Exposure to RTL compilation and Synthesis flow including ...
As a Staff Design Engineer, your job will entail the following: * Own design planning and ... flows for SoC IO validation * Exposure to RTL compilation and Synthesis flow including ...
SOC Physical Design Static Timing Analysis Engineer
Phoenix, AZ · On-site
$164K - $311K/yr
As a Physical Design Timing Engineer, you will play a pivotal role in shaping the performance, power efficiency, and functionality of Intel's cutting-edge System-on-Chip (SoC) designs. Your expertise ...
SOC Physical Design Static Timing Analysis Engineer
Phoenix, AZ · On-site
$164K - $311K/yr
As a Physical Design Timing Engineer, you will play a pivotal role in shaping the performance, power efficiency, and functionality of Intel's cutting-edge System-on-Chip (SoC) designs. Your expertise ...
SOC Physical Design Static Timing Analysis Engineer
Phoenix, AZ · On-site
$164K - $311K/yr
As a Physical Design Timing Engineer, you will play a pivotal role in shaping the performance, power efficiency, and functionality of Intel's cutting-edge System-on-Chip (SoC) designs. Your expertise ...
SOC Physical Design Static Timing Analysis Engineer
Phoenix, AZ · On-site
$164K - $311K/yr
As a Physical Design Timing Engineer, you will play a pivotal role in shaping the performance, power efficiency, and functionality of Intel's cutting-edge System-on-Chip (SoC) designs. Your expertise ...
Mentor engineers on design implementation flows, timing closure strategies, and multi-die design ... Prime Power/VCLP/RTL architect * Conformal/Formality * Deep understanding of SoC timing ...
Mentor engineers on design implementation flows, timing closure strategies, and multi-die design ... Prime Power/VCLP/RTL architect * Conformal/Formality * Deep understanding of SoC timing ...
Mentor engineers on design implementation flows, timing closure strategies, and multi-die design ... Prime Power/VCLP/RTL architect * Conformal/Formality * Deep understanding of SoC timing ...
Mentor engineers on design implementation flows, timing closure strategies, and multi-die design ... Prime Power/VCLP/RTL architect * Conformal/Formality * Deep understanding of SoC timing ...
Partner closely with Architecture, RTL Design, Digital Signal Processing (DSP), and Physical Design ... Bachelor of Science in Electrical Engineering or Computer Science, with strong digital design ...
Partner closely with Architecture, RTL Design, Digital Signal Processing (DSP), and Physical Design ... Bachelor of Science in Electrical Engineering or Computer Science, with strong digital design ...
Partner closely with Architecture, RTL Design, Digital Signal Processing (DSP), and Physical Design ... Bachelor of Science in Electrical Engineering or Computer Science, with strong digital design ...
Partner closely with Architecture, RTL Design, Digital Signal Processing (DSP), and Physical Design ... Bachelor of Science in Electrical Engineering or Computer Science, with strong digital design ...
SoC Interconnect Technology Team Lead
Chandler, AZ · Hybrid
$242K - $314K/yr
Guide microarchitecture, RTL design, and verification strategy for interconnect IP. * Lead debug ... Mentor and grow a team of architects and engineers. * Contribute to roadmap planning for next ...
SoC Interconnect Technology Team Lead
Chandler, AZ · Hybrid
$242K - $314K/yr
Guide microarchitecture, RTL design, and verification strategy for interconnect IP. * Lead debug ... Mentor and grow a team of architects and engineers. * Contribute to roadmap planning for next ...
Digital IC Design Engineer | DCC DAC
Tucson, AZ · On-site
$131K/yr
Your responsibilities will include defining, RTL coding, simulation, synthesis, timing closure ... As a design engineer, you will prepare test methods and specifications, assist in preparation of ...
Digital IC Design Engineer | DCC DAC
Tucson, AZ · On-site
$131K/yr
Your responsibilities will include defining, RTL coding, simulation, synthesis, timing closure ... As a design engineer, you will prepare test methods and specifications, assist in preparation of ...
FPGA Engineer (Space)
Tempe, AZ · On-site
$164K - $246K/yr
Own the architecture, design, and implementation of FPGA based digital systems * Develop RTL in ... Integrate and deploy designs on FPGA and FPGA SoC platforms * Collaborate with team members to ...
FPGA Engineer (Space)
Tempe, AZ · On-site
$164K - $246K/yr
Own the architecture, design, and implementation of FPGA based digital systems * Develop RTL in ... Integrate and deploy designs on FPGA and FPGA SoC platforms * Collaborate with team members to ...
FPGA Engineer (Space)
Tempe, AZ · On-site
$164K - $246K/yr
Own the architecture, design, and implementation of FPGA based digital systems * Develop RTL in ... Integrate and deploy designs on FPGA and FPGA SoC platforms * Collaborate with team members to ...
FPGA Engineer (Space)
Tempe, AZ · On-site
$164K - $246K/yr
Own the architecture, design, and implementation of FPGA based digital systems * Develop RTL in ... Integrate and deploy designs on FPGA and FPGA SoC platforms * Collaborate with team members to ...
Senior Synthesis & Place & Route (P&R) Engineer - MRAM Subsystems
Arizona City, AZ · On-site
$136K - $141K/yr
... SoC memory subsystems (STT-MRAM / SOT-MRAM). You will bridge the gap between RTL logic design, high ... S. in Electrical Engineering, Computer Engineering, or a related field. * 7+ years of hands-on ...
Senior Synthesis & Place & Route (P&R) Engineer - MRAM Subsystems
Arizona City, AZ · On-site
$136K - $141K/yr
... SoC memory subsystems (STT-MRAM / SOT-MRAM). You will bridge the gap between RTL logic design, high ... S. in Electrical Engineering, Computer Engineering, or a related field. * 7+ years of hands-on ...
Board Design Engineer
Tucson, AZ · On-site
RTL/VHDL experience is a plus. * Experience with high-speed interfaces such as SPI, I2C, CAN, USB ... Familiarity with power design and embedded system integration. * Power electronics, motor control ...
Quick apply
Board Design Engineer
Tucson, AZ · On-site
RTL/VHDL experience is a plus. * Experience with high-speed interfaces such as SPI, I2C, CAN, USB ... Familiarity with power design and embedded system integration. * Power electronics, motor control ...
Board Design Engineer
Tucson, AZ · Hybrid
RTL/VHDL experience is a plus. * Experience with high-speed interfaces such as SPI, I2C, CAN, USB ... Familiarity with power design and embedded system integration. * Power electronics, motor control ...
Board Design Engineer
Tucson, AZ · Hybrid
RTL/VHDL experience is a plus. * Experience with high-speed interfaces such as SPI, I2C, CAN, USB ... Familiarity with power design and embedded system integration. * Power electronics, motor control ...
Board Design Engineer
Tucson, AZ · On-site
RTL/VHDL experience is a plus. * Experience with high-speed interfaces such as SPI, I2C, CAN, USB ... Familiarity with power design and embedded system integration. * Power electronics, motor control ...
Board Design Engineer
Tucson, AZ · On-site
RTL/VHDL experience is a plus. * Experience with high-speed interfaces such as SPI, I2C, CAN, USB ... Familiarity with power design and embedded system integration. * Power electronics, motor control ...
Senior FPGA Engineer
Chandler, AZ · On-site
$132K - $170K/yr
Design, develop, document, debug, and test FPGA SoC systems, including: * IP integration into FPGA ... Ability to create RTL simulations to identify and resolve issues prior to hardware testing.
Senior FPGA Engineer
Chandler, AZ · On-site
$132K - $170K/yr
Design, develop, document, debug, and test FPGA SoC systems, including: * IP integration into FPGA ... Ability to create RTL simulations to identify and resolve issues prior to hardware testing.
Digital and Mixed Signal IC Design/DV Engineer
Tucson, AZ · On-site
$116K/yr
Contribute to the full IC development lifecycle, including RTL design, synthesis, place and route ... Engineer your future. We empower our employees to truly own their career and development. Come ...
Digital and Mixed Signal IC Design/DV Engineer
Tucson, AZ · On-site
$116K/yr
Contribute to the full IC development lifecycle, including RTL design, synthesis, place and route ... Engineer your future. We empower our employees to truly own their career and development. Come ...
Soc Rtl Design Engineer information
What cities in Arizona are hiring for Soc Rtl Design Engineer jobs?
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Technical Staff Engineer - Verification
Chandler, AZ • On-site
Full-time
Medical, Retirement
Re-posted 20 days ago
Microchip Technology rating
8.0
Based on 33 frontline employees who took The Breakroom Quiz
63rd of 162 rated electronics manufacturers
Job description
People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip's nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it's won us countless awards for diversity and workplace excellence.
Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.
Visit our careers page to see what exciting opportunities and company perks await!
Job Description:
The FPGA Business Unit of Microchip Technology Inc is seeking an experienced and innovative verification engineer for our team in Chandler, Arizona to work on the verification of our next generation, highly secure, low-power FPGA device products.
Key Responsibilities:
- Verification of complex subsystems and SoC using an optimal combination of constrained random, formal and C based verification methodologies.
- Develop and maintain highly reusable UVM based test benches and verification environments.
- Involve in RTL, power aware and gate level verification.
- Contribute to quality and productivity be using AI/ML-enabled verification methodologies
- Collaborate with emulation and hardware prototyping teams to define a unified verification methodology.
- Collaborate with architecture and design teams to ensure seamless execution and first-silicon success.
- Mentor junior team members.
Requirements/Qualifications:
Required Qualifications:
- 12+ years in functional verification of complex SoC designs
- Expertise in System Verilog, UVM, formal verification methodologies
- Proven experience in methodology development and tool automation.
- Familiarity with AI/ML-driven EDA tools and scripting for flow integration.
- Good understanding of SoC architectures - ARM/RISC-V
- Expertise in at least two of the following domains/peripherals
- CPU subsystems
- PCIe Gen3/Gen4/Gen5
- DDR4/DDR5, LPDDR4X
- MIPI DSI/CSI
- Ethernet MAC
- USB
- Security and cryptography IPs.
- Exposure to emulation, hardware prototyping and post-silicon debug
- Experience with FPGA-based acceleration platforms and simulation/emulation flows.
- Software & Scripting:
- Python, TCL/TK, and C/C++ for automation and validation.
- Tools:
- Familiarity with Siemens/Cadence/Synopsys verification suites
- Revision control systems (Git, Perforce, svn).
- Excellent debug skills
- Experience working with global cross functional teams
- Excellent communication and collaboration skills
Preferred Skills:
- Highly Desirable: Strong understanding of FPGA architecture
- Experience with coverage-driven verification using ML-based optimizations.
- Experience in emulation, hardware prototyping and post-silicon debug,
- Knowledge and exposure to complete SOC RTL to GDS to silicon release flow.
Required Education:
- BS or MS in Electrical/Electronic Engineering with 12+ years of experience
Travel Time:
0% - 25%
Physical Attributes:
Hearing, Seeing, Talking, Works Alone, Works Around Others
Physical Requirements:
80% sitting, 10% walking, 10% standing
Pay Range:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading ESPP program with a 2 year look back feature. Find more information about all our benefits at the link below:
Benefits of working at Microchip
The annual base salary range for this position, which could be performed in the US, is $91,000 - $232,000.*
*Range is dependent on numerous factors including job location, skills and experience.
Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.
For more information on applicable equal employment regulations, please refer to the Know Your Rights: Workplace Discrimination is Illegal Poster.
To all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.
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About Microchip
Sourced by ZipRecruiter
Industry
It services
Company size
10,000+ Employees
Headquarters location
Chandler, AZ, US
Year founded
1989