ZipRecruiter

Log In

1

Silicon Validation Jobs in Oregon (NOW HIRING)

K2 Space

Senior ASIC Design Verification Engineer

OR · On-site +1

$170K - $250K/yr

Support silicon bring-up and post-silicon validation through test reuse, diagnostics, and debug analysis. * Participate in ASIC team interviews. * Contribute to advancement of DV methodologies and ...

K2 Space

Principal ASIC Design Verification Engineer

OR · On-site +1

$190K - $285K/yr

Support silicon bring-up and post-silicon validation through test reuse, diagnostics, and debug analysis. * Participate in ASIC team interviews. * Drive advancement of DV methodologies and ...

Microsoft

Senior Debug Tools Engineer

Hillsboro, OR · On-site

$113K - $156K/yr

Design, develop, validate, and maintain silicon debug tools and automation frameworks used during pre-silicon and post-silicon bring-up of Microsoft server-class SoCs. * Develop and enhance debug ...

New

Staffingine LLC

Hardware Debug Engineer

Hillsboro, OR · On-site

$134K - $177K/yr

The primary responsibility of this position entails executing the silicon validation and characterization of cutting edge highperformance highspeed low power CMOS D2D and SERDES silicon interface ...

K2 Space

Senior ASIC Emulation Engineer

OR · On-site +1

$170K - $250K/yr

You will work closely with architecture, RTL design, DFT, DV, firmware, physical design, and silicon validation teams to enable highfidelity hardware/software co-development and accelerate ...

Intel

Senior Analog Design Engineer

Hillsboro, OR · On-site

$220K/yr

Validation and Optimization Develop test plans and oversee silicon characterization. Debug and resolve design issues during pre and post-silicon phases. Optimize designs for performance, power, and ...

next page

Showing results 1-20

All JobsSilicon Validation JobsSilicon Validation Jobs in Oregon

Silicon Validation information

What is silicon validation?

Silicon validation is the process of testing and verifying integrated circuits (ICs) or chips after they have been manufactured, to ensure they function as intended in real-world conditions. This involves running a series of tests to check for defects, performance issues, and compliance with design specifications. Silicon validation is a critical step before mass production, as it helps identify and resolve any issues that may have been missed during earlier design and simulation phases. The process typically includes both functional and electrical testing, often using specialized hardware and software tools.

What are some common challenges faced by professionals in silicon validation, and how can they be managed effectively?

Professionals in silicon validation often encounter challenges such as debugging complex hardware issues, tight project deadlines, and the need to quickly adapt to evolving specifications. Managing these difficulties typically involves collaborating closely with design, verification, and software teams to isolate and resolve bugs efficiently. Staying organized, maintaining clear documentation, and leveraging automated validation tools can also help streamline workflows and mitigate time pressure. Continuous learning and proactive communication are key to navigating the fast-paced nature of silicon validation projects.

What are the key skills and qualifications needed to thrive as a silicon validation engineer, and why are they important?

To thrive as a Silicon Validation Engineer, you need a solid background in electrical engineering or computer engineering, with expertise in digital and analog circuit fundamentals. Familiarity with lab equipment (oscilloscopes, logic analyzers), scripting languages (Python, Perl), and validation tools, as well as knowledge of relevant industry standards, is highly valued. Strong problem-solving skills, attention to detail, and effective communication are crucial soft skills for diagnosing issues and collaborating with cross-functional teams. These competencies ensure thorough validation of silicon chips, leading to robust, high-quality products and successful project outcomes.

What is the difference between Silicon Validation vs Silicon Design Engineer?

AspectSilicon ValidationSilicon Design Engineer
Primary FocusTesting and verifying silicon chips post-fabricationDesigning and developing silicon chips from concept to layout
Skills & CertificationsHardware testing, scripting, verification tools, FPGA experienceVLSI design, CAD tools, digital logic, HDL proficiency
Work EnvironmentLab testing, hardware debugging, collaboration with validation teamsDesign labs, CAD software, collaboration with design teams
Industry UsageUsed in semiconductor companies, hardware firms, and validation labsUsed in chip design companies, semiconductor firms, and R&D departments

Silicon Validation focuses on testing and verifying chips after manufacturing, ensuring functionality and performance. Silicon Design Engineers create the chip architecture and layout before fabrication. Both roles require technical skills but differ in their stage of involvement in the chip development process.

What are popular job titles related to Silicon Validation jobs in Oregon?

For Silicon Validation jobs in Oregon, the most frequently searched job titles are:

What job categories do people searching Silicon Validation jobs in Oregon look for?

The top searched job categories for Silicon Validation jobs in Oregon are:

Silicon Validation jobs near you
Infographic showing various Silicon Validation job openings in Oregon as of August 2026, with employment types broken down into 1% As Needed, 86% Full Time, 9% Part Time, and 4% Contract. Highlights an 84% Physical, 5% Hybrid, and 11% Remote job distribution.

Silicon Validation Engineer

Purple Hires Inc

Hillsboro, OR • On-site

Contractor

Re-posted 7 days ago

Job description

Typical Day in the Role
• Purpose of the Team: The main function of Silicon Validation Engineer is to run, triage, and maintain silicon system regressions and report the results
· Key projects:
→ Run and maintain silicon system regressions
→ Report results of silicon system regressions
→ Triage issues with various debugging tools
→ Review and validate any system updates made by other teams
Candidate Requirements
· Disqualifiers:
□ Candidates unable to work onsite 5 days/week in Hillsboro lab environment
□ Candidates lacking hands-on engineering-level experience in silicon validation (technician-only profiles are not a fit)
□ No experience with PCIe, CXL, IO, endpoints (network/storage), or system-level validation
□ Must have their full 18months of tenure
• Best vs. Average:
→ Bachelor's or master's degree in electrical engineering, computer engineering, or related field.
→ 3+ years of experience in silicon validation, testing, or debugging.
→ Demonstrated validation experience in one or more of the following:
→ Validation of:
→ Functional: PCIe, CXL, IO, End Points (network, storage), Power Management, BIOS/FW development and debug.
→ Electrical: Serdes, IO
→ Applied understanding of Computer Architecture and CPU/SoC validation principles, including: Understanding of SoC subsystem, SoC system level, and platform level functionality and writing scripts/software with industry standard languages like Python or C/C++.
→ Understanding system level software and firmware.
→ Experience with hardware and software debug tools such as oscilloscopes, logic analyzers, JTAG, BERT, etc.
→ Proficient in scripting languages such as Python, C++.
→ Understanding of board level schematics.
→ Excellent problem-solving, analytical, and communication skills.
Skills:
• Expertise in Python, C, and C++
• Some knowledge of Verilog
• Attention to detail; analytical and problem-solving ability

 

 Explain a typical day in the role.:

Develop and execute validation test plans for various SoC features and subsystems in one of the following areas - functional, electrical, or power/performance.
Perform functional, stress, and performance testing using hardware and software tools.
Analyze test results and identify, isolate, and debug issues.

What is the ideal background of a candidate for this role?:

Engineering knowledge and experience with high-speed IO interfaces (PLL, PCI, CXL, etc.) and their interactions with other parts of the SoC, the platform, and software.

   What are unique selling points that would get candidates interested in your role over another?:

Work on the state-of-the-art Compute SOC which powers Cloud infrastructure.

 

Top 3 Must-Have HARD Skills & years of experience for each:

Engineering level knowledge: PCIe, CXL, IO, End Points (network, storage), and debug. 3+ years
Electrical: Serdes, IO knowledge. 3+ years
Overall silicon validation knowledge. 3+ years