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Serdes Test Engineer Jobs (NOW HIRING)

Meet the Team As a Test Engineer in Silicon Operations, you'll join forces with expert ASIC design ... and SerDes. * Experience with yield improvement and test time reduction activities. * Ability to ...

Meet the Team As a Test Engineer in Silicon Operations, you'll join forces with expert ASIC design ... and SerDes. * Experience with yield improvement and test time reduction activities. * Ability to ...

ATE Test Development Engineer

Irvine, CA · On-site

$108K - $192K/yr

... Engineer. Products include networking switches for NIC, Scale Up, Scale Out, Scale Across ... speed serdes (>100G) and bring the product from design to manufacturing. * Test Hardware ...

... Engineer. Products include networking switches for NIC, Scale Up, Scale Out, Scale Across ... speed serdes (>100G) and bring the product from design to manufacturing. * Test Hardware ...

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Serdes Test Engineer information

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$28

$59

$92

How much do serdes test engineer jobs pay per hour?

As of Jun 8, 2026, the average hourly pay for serdes test engineer in the United States is $59.03, according to ZipRecruiter salary data. Most workers in this role earn between $44.71 and $75.96 per hour, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a Serdes Test Engineer, and why are they important?

To thrive as a Serdes Test Engineer, you need a solid background in electrical engineering, signal integrity, and high-speed digital design, often supported by a relevant degree. Proficiency with oscilloscopes, bit error rate testers (BERTs), lab automation software, and familiarity with industry standards like PCIe or Ethernet is typically required. Strong problem-solving, attention to detail, and effective communication skills help you diagnose issues and collaborate with cross-functional teams. These competencies ensure accurate validation of Serdes interfaces, which is vital for reliable high-speed data transmission in modern electronic systems.

What are some typical challenges faced by Serdes Test Engineers during validation and how are they addressed?

Serdes Test Engineers often encounter challenges such as signal integrity issues, jitter, and crosstalk when validating high-speed serial interfaces. Addressing these requires a deep understanding of test equipment, careful setup of test environments, and collaboration with design and layout teams to troubleshoot root causes. Engineers frequently use oscilloscopes, BERTs, and protocol analyzers to capture and analyze signal anomalies, and may need to adjust test methodologies or recommend design changes to meet compliance standards.

What is a Serdes Test Engineer?

A Serdes Test Engineer is a professional who specializes in testing serializer/deserializer (SerDes) components used in high-speed data communication interfaces. Their responsibilities typically include developing and executing test plans, validating signal integrity, debugging hardware and firmware issues, and ensuring compliance with industry standards. They work closely with design and validation teams to identify and resolve performance or reliability issues in SerDes circuits. This role requires strong knowledge of high-speed digital electronics, test equipment, and protocols such as PCIe, Ethernet, or USB.
Infographic showing various Serdes Test Engineer job openings in the United States as of May 2026, with employment types broken down into 1% As Needed, 95% Full Time, 1% Part Time, and 3% Contract. Highlights an 87% Physical, 8% Hybrid, and 5% Remote job distribution, with an average salary of $122,773 per year, or $59 per hour.
Senior Principal SERDES Engineer - Signal Integrity

Senior Principal SERDES Engineer - Signal Integrity

Marvell

Santa Clara, CA • On-site

$196K/yr

Other

Life, Retirement

Posted 1 hour ago


Job description

About Marvell

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

The Marvell post silicon validation group designs and develops test platforms for validating enterprise, cloud, AI, automotive, and carrier architectures including multi-core Arm-based Network processors. The electrical characterization team is a post silicon validation sub-group focused on the debug and characterization of SerDes and DDR interfaces on the processor. The SerDes interface use NRZ and PAM4 signaling for Ethernet, CPRI, JESD, and PCIe interfaces. DRAM interfaces include LPDDR5, DDR4/5 memory modules.
Characterization engineers are responsible for developing test platforms used and automated test suites to characterize the analog interfaces over process voltage and temperature (PVT) extremes to determine silicon viability for volume production.

What You Can Expect

Marvell is seeking a Senior Principal SERDES Signal Integrity Engineer to lead SERDES IP validation for next-generation high-performance compute and storage solutions. This role is critical in shaping Marvell's leadership in Ethernet IEEE 802.3dj and PCIe Gen6 technologies-interfaces that define the future of hyperscale data centers and AI infrastructure.

The ideal candidate will have expertise in signal integrity, board-level knowledge, SERDES architecture and measurement methods, especially for Ethernet and PCIe interfaces. The position requires a strong background in characterization and design of SERDES IP with special consideration for direct experience in the processors industry. The candidate must have in depth knowledge of the instrumentation necessary for testing the SERDES IP combined with a strong commitment to ensuring characterization of such IP for extremely high-volume production. The candidate will drive electrical characterization and compliance for cutting-edge SERDES IP that powers Marvell's flagship products. Responsibilities include ensuring robust performance at 112G/224G Ethernet and PCIe Gen6 speeds, enabling ultra-high bandwidth and low-latency interconnects for tomorrow's compute platforms.

  • Lead electrical characterization and compliance for SERDES IP targeting Ethernet IEEE 802.3dj and PCIe Gen6 standards.
  • Develop and implement automated validation methodologies, regression frameworks, and compliance test plans for SERDES interface.
  • Drive signal integrity analysis and optimization for high-speed channels, including correlation between modeling, simulation and lab measurements.
  • Provide technical leadership and applications engineering support to strategic customers.
  • Define equipment CAPEX plans for advanced test equipment and ensure readiness for future SERDES IP.
  • Mentor and grow team expertise in high-speed signal integrity and debugging.
  • Represent Marvell in standards committees (IEEE 802.3, PCI-SIG) and influence next-generation interface specifications.
  • Collaborate on high-speed board design, extraction, and characterization, and partner with internal tools teams to build robust test infrastructure.
  • Work closely with executive leadership to define long-term SERDES validation strategies impacting Marvell's success.

What We're Looking For

  • Bachelor's degree in Computer Science, Electrical Engineering or related fields and 12+ years of related professional experience OR Master's / PhD degree in Computer Science, Electrical Engineering or related fields with 7+ years of experience.
  • 5-7+ years of direct experience in SERDES characterization and design.
  • Deep expertise in Ethernet IEEE 802.3ck/dj electrical compliance and validation.
  • Strong knowledge of signal integrity principles, channel modeling, and board-level design for high-speed interfaces.
  • In depth working knowledge of test equipment used for SERDES characterization (Scope, BERT, Network analyzer etc.).
  • Experience in scripting languages development, for example Python, etc.
  • Critical thinking and problem-solving attitude and ownership of the group's results.
  • Excellent verbal and written communication skills.

Expected Base Pay Range (USD)

173,280 - 259,600, $ per annum

The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life's most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.

Interview Integrity

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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