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Senior Rfic Design Engineer Jobs in Loveland, CO

Design Engineer

Fort Collins, CO · On-site

$60K - $96K/yr

The role offers exposure to advanced design methodologies and close collaboration with senior engineers across multiple disciplines to deliver industry-leading silicon solutions. Key Responsibilities

The role offers exposure to advanced design methodologies and close collaboration with senior engineers across multiple disciplines to deliver industry-leading silicon solutions. Key Responsibilities

Design engineers work in tandem with senior staff to plan, schedule, and coordinate detailed phases of the engineering work on projects of moderate scope or on a portion of a major project. EXAMPLE ...

Join a world-class team of scientists, engineers, and business professionals to advance the state-of-the-art in quantum computing. Atom Computing is seeking a Senior ASIC Designer to design and ...

New

Senior ASIC Design Engineer

Boulder, CO · On-site

$140K - $175K/yr

Join a world-class team of scientists, engineers, and business professionals to advance the state-of-the-art in quantum computing. Atom Computing is seeking a Senior ASIC Designer to design and ...

New

Lead design development for smaller or less complex projects and support senior engineers on technically advanced projects. Minimum Qualifications: * Bachelor's degree in Electrical Engineering * 0-4 ...

Lead design development for smaller or less complex projects and support senior engineers on technically advanced projects. Minimum Qualifications: * Bachelor's degree in Electrical Engineering * 0-4 ...

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Showing results 1-20

Senior Rfic Design Engineer information

See Loveland, CO salary details

$72.5K

$138.3K

$200.4K

How much do senior rfic design engineer jobs pay per year?

As of Aug 15, 2026, the average yearly pay for senior rfic design engineer in Loveland, CO is $138,327.00, according to ZipRecruiter salary data. Most workers in this role earn between $110,500.00 and $161,900.00 per year, depending on experience, location, and employer.

What is a Senior RFIC Design Engineer?

A Senior RFIC (Radio Frequency Integrated Circuit) Design Engineer is an experienced professional who designs, develops, and tests high-frequency integrated circuits used in wireless communication devices. They work extensively with analog and mixed-signal circuits, and are responsible for ensuring the performance, reliability, and manufacturability of RFICs for applications such as mobile phones, Wi-Fi, and IoT devices. In addition to technical design tasks, Senior RFIC Design Engineers often mentor junior engineers, collaborate with cross-functional teams, and contribute to the overall architecture of wireless systems.

What are the key skills and qualifications needed to thrive as a Senior RFIC Design Engineer, and why are they important?

To thrive as a Senior RFIC Design Engineer, you need deep expertise in RF circuit theory, semiconductor physics, and hands-on experience with analog/mixed-signal IC design, usually backed by a master's or PhD in electrical engineering. Mastery of industry-standard EDA tools (such as Cadence Virtuoso, Spectre, and EM simulators) and familiarity with relevant process design kits (PDKs) and lab measurement equipment is essential. Strong analytical thinking, teamwork, and effective communication set outstanding engineers apart. These skills ensure the development of high-performance, reliable RFICs through efficient problem-solving, collaboration, and precise execution in a fast-evolving field.

What is the difference between Senior Rfic Design Engineer vs RFIC Design Engineer?

AspectSenior Rfic Design EngineerRFIC Design Engineer
CredentialsBachelor's or Master's in Electrical Engineering, specialized in RFIC designBachelor's or Master's in Electrical Engineering, with RF focus
Work EnvironmentDesign teams, R&D labs, semiconductor companiesDesign teams, semiconductor firms, integrated circuit companies
Industry UsageUsed in advanced wireless, telecom, and satellite systemsUsed in wireless communication, mobile devices, and RF components

The main difference is that a Senior Rfic Design Engineer typically has more experience and leadership responsibilities in RFIC design projects, whereas an RFIC Design Engineer may be earlier in their career or at a non-senior level. Both roles focus on RF integrated circuit design but differ in seniority and scope of responsibilities.

What are some common challenges faced by Senior RFIC Design Engineers during the chip design and validation process?

Senior RFIC Design Engineers often encounter challenges such as meeting stringent performance specifications within tight power and area constraints, managing electromagnetic interference, and ensuring the design complies with fabrication process limitations. Additionally, integrating RF circuits with digital and analog components on the same chip can introduce complex noise coupling issues that must be mitigated through careful layout and simulation. Close collaboration with layout engineers, validation teams, and system architects is essential to address these challenges and to deliver robust, manufacturable designs on schedule.

What cities near Loveland, CO are hiring for Senior Rfic Design Engineer jobs?

Cities near Loveland, CO with the most Senior Rfic Design Engineer job openings:

Infographic showing various Senior Rfic Design Engineer job openings in Loveland, CO as of August 2026, with employment types broken down into 87% Full Time, 8% Part Time, and 5% Contract. Highlights an 85% Physical, 4% Hybrid, and 11% Remote job distribution, with an average salary of $138,327 per year, or $66.5 per hour.

Design Engineer

Broadcom, Inc.

Fort Collins, CO • On-site

$60K - $96K/yr

Full-time

Medical, Dental, Vision, Retirement, PTO

Re-posted 27 days ago


Broadcom rating

8.7

Company rating: 8.7 out of 10

Based on 23 frontline employees who took The Breakroom Quiz

19th of 157 rated electronics manufacturers


Job description

Please Note:
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Job Description:
Be part of the Custom Silicon Design Team within Broadcom's ASIC Products Division in beautiful Fort Collins, Colorado. Join a world-class engineering group developing custom CMOS ASICs for cutting-edge AI, Cellular, Networking, Computing, and Storage products. This position offers the opportunity to work on high-performance SoC designs operating at speeds exceeding 1 GHz, from concept through production.
Role Overview
This Design Engineering position focuses on the physical implementation of high-performance ASICs, providing hands-on experience with the latest 3 nm and smaller process nodes. The role offers exposure to advanced design methodologies and close collaboration with senior engineers across multiple disciplines to deliver industry-leading silicon solutions.
Key Responsibilities
  • Contribute to the physical design implementation of large-scale ASICs (multi-hundred-million gate complexity).
  • Support key design activities including floorplanning, placement, clock tree synthesis, routing, timing closure, and physical verification (DRC/LVS).
  • Collaborate with cross-functional teams on block-level integration, timing analysis, and design signoff.
  • Utilize both commercial and in-house EDA tools for design, implementation, and verification.
  • Contribute to design flow improvements, automation, and deep sub-micron methodology development.
  • Assist in timing analysis, power planning, IR/EM checks, and post-route optimization.
  • Gain exposure to the complete ASIC design cycle - from RTL to GDSII and silicon bring-up.
  • Interface with customers and internal stakeholders to support technical discussions and design reviews.

Technical Skills / Background
  • Solid understanding of VLSI design, CMOS logic, and digital circuit fundamentals.
  • Familiarity with ASIC physical design concepts such as placement, routing, and timing.
  • Strong analytical and debugging skills, with the ability to quickly learn new tools and flows.

Coding and Tool Proficiency
  • Proficiency in UNIX/Linux environments.
  • Working knowledge of TCL; familiarity with Python or Perl preferred.
  • Exposure to EDA tools such as Cadence Innovus, Synopsys ICC2, or PrimeTime is a plus.

Soft Skills
  • Excellent communication, collaboration, and problem-solving abilities.
  • Ability to work effectively with cross-functional and global teams.
  • Highly motivated, detail-oriented, and eager to learn in a fast-paced R&D environment.
  • Demonstrates strong engineering judgment, ownership, and accountability.

Education and Experience
  • Bachelor's degree in Electrical or Electronics Engineering, or
  • Master's degree in Electrical or Electronics Engineering.

Additional Job Description:
Compensation and Benefits
The annual base salary range for this position is $60,200 - $96,300.
This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.
If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

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