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Senior Design Verification Engineer Jobs in Texas

Description As a Design Verification Engineer, you'll be at the center of our silicon design group's verification efforts, ensuring the quality and reliability of next-generation cellular systems.

Description As a Design Verification Engineer, you'll be at the center of our silicon design group's verification efforts, ensuring the quality and reliability of next-generation cellular systems.

Description As a Design Verification Engineer, you'll be at the center of our silicon design group's verification efforts, ensuring the quality and reliability of next-generation cellular systems.

SOC Design Verification Engineer

Dallas, TX · On-site

$127K - $156K/yr

SOC Design Verification Engineer Location: Redmond, WA (Onsite) Duration: 10 Months Minimum Qualifications • Track record of 'first-pass success' in ASIC development cycles. • Bachelor's degree ...

Design Verification Engineer

Austin, TX

$134K - $164K/yr

Design Verification Engineers at Apple are responsible for verifying the functionality and performance of Apple's premier SOCs. This is a critical job within Apple's Hardware Technology and we'd love ...

Design Verification Engineer

Austin, TX · On-site

$134K - $164K/yr

Design Verification Engineers at Apple are responsible for verifying the functionality and performance of Apple's premier SOCs. This is a critical job within Apple's Hardware Technology and we'd love ...

Design Verification Engineer

Austin, TX

$134K - $164K/yr

We have an opportunity for an outstandingly hardworking design verification engineer. As a member of our wide-ranging group, you will have the rare and extraordinary opportunity to craft upcoming ...

Design Verification Engineer

Austin, TX · On-site

$134K - $164K/yr

Design Verification Engineers at Apple are responsible for verifying the functionality and performance of Apple's premier SOCs. This is a critical job within Apple's Hardware Technology organization ...

Design Verification Engineer

Austin, TX

$134K - $164K/yr

Design Verification Engineers at Apple are responsible for verifying the functionality and performance of Apple's premier SOCs. This is a critical job within Apple's Hardware Technology organization ...

Design Verification Engineer

Austin, TX · On-site

$134K - $164K/yr

We have an opportunity for an outstandingly hardworking design verification engineer. As a member of our wide-ranging group, you will have the rare and extraordinary opportunity to craft upcoming ...

What You'll Do As a Senior CPU Design Verification Engineer you will play a critical role in ensuring architectural correctness, functional robustness, and powerefficient performance of Intel's Atom ...

Design Verification Engineer

Austin, TX · On-site

$134K - $164K/yr

Design Verification Engineers at Apple are responsible for verifying the functionality and performance of Apple's premier SOCs. This is a critical job within Apple's Hardware Technology organization ...

Design Verification Engineer

Austin, TX

$134K - $164K/yr

Design Verification Engineers at Apple are responsible for verifying the functionality and performance of Apple's premier SOCs. This is a critical job within Apple's Hardware Technology organization ...

Design Verification Engineer

Austin, TX · On-site

$134K - $164K/yr

We have an opportunity for an outstandingly hardworking design verification engineer! As a member of our wide-ranging group, you will have the rare and extraordinary opportunity to craft upcoming ...

Design Verification Engineer

Austin, TX

$134K - $164K/yr

We have an opportunity for an outstandingly hardworking design verification engineer! As a member of our wide-ranging group, you will have the rare and extraordinary opportunity to craft upcoming ...

Showing results 41-60

Senior Design Verification Engineer information

See Texas salary details

$58.7K

$113.2K

$178.4K

How much do senior design verification engineer jobs pay per year?

As of Aug 11, 2026, the average yearly pay for senior design verification engineer in Texas is $113,164.00, according to ZipRecruiter salary data. Most workers in this role earn between $88,500.00 and $129,000.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a senior design verification engineer?

A Senior Design Verification Engineer requires deep expertise in digital design principles, verification methodologies (such as UVM or OVM), and a degree in electrical or computer engineering. Familiarity with hardware description languages (like Verilog or VHDL), simulation tools (e.g., Synopsys VCS, Cadence Incisive), and scripting languages (such as Python or TCL) is typically expected. Exceptional problem-solving, attention to detail, and strong communication skills help in collaborating with cross-functional teams and navigating complex verification challenges. These skills and qualifications are vital to ensure robust, high-quality hardware designs that meet performance and reliability standards.

How much does a senior design verification engineer make?

A senior design verification engineer typically earns between $100,000 and $150,000 annually, depending on experience, location, and industry. They often have expertise in hardware description languages like VHDL or Verilog and may hold certifications such as Certified Verification Engineer (CVE).

What is the difference between Senior Design Verification Engineer vs Design Verification Engineer?

AspectSenior Design Verification EngineerDesign Verification Engineer
Required CredentialsBachelor's or Master's in Electrical Engineering, Computer Engineering, or related field; experience in verification tools and methodologiesBachelor's degree in Electrical Engineering, Computer Engineering, or related field; entry-level experience in verification
Work EnvironmentDesign teams, hardware/software verification labs, collaborative projectsVerification teams, testing labs, development environments
Employer & Industry UsageSemiconductor, electronics, hardware development companiesSimilar industries, often as entry or mid-level roles within verification teams

The main difference is experience level and responsibility. Senior Design Verification Engineers typically lead verification efforts, mentor junior staff, and handle complex verification tasks, while Design Verification Engineers focus on executing verification plans and testing designs under supervision. Both roles require similar technical skills and industry knowledge, but the senior role involves more leadership and strategic planning.

What is a senior design verification engineer?

Senior Design Verification Engineers are experienced professionals responsible for ensuring that hardware designs, such as integrated circuits or system-on-chip (SoC) components, meet all functional specifications and quality standards before manufacturing. They create and execute verification plans, develop testbenches, and use simulation tools to identify and resolve design issues. Their expertise helps prevent costly errors, ensuring reliable and functional products. Typically, they collaborate closely with design, validation, and product engineering teams and often mentor junior engineers.

What are some typical challenges faced by senior design verification engineers when working on complex chip designs?

Senior Design Verification Engineers often encounter challenges such as managing verification of increasingly complex and large-scale integrated circuits, ensuring comprehensive coverage, and identifying hard-to-find corner-case bugs. They frequently collaborate across cross-functional teams, including design, firmware, and test engineering, to clarify specifications and resolve issues. Effective communication and a proactive approach to debugging and process improvement are critical, as is keeping up with evolving verification methodologies and tools to ensure high-quality, on-time project delivery.
What are the most commonly searched types of Design Verification Engineer jobs in Texas? The most popular types of Design Verification Engineer jobs in Texas are:
What job categories do people searching Senior Design Verification Engineer jobs in Texas look for? The top searched job categories for Senior Design Verification Engineer jobs in Texas are:
What cities in Texas are hiring for Senior Design Verification Engineer jobs? Cities in Texas with the most Senior Design Verification Engineer job openings:
Infographic showing various Senior Design Verification Engineer job openings in Texas as of August 2026, with employment types broken down into 1% Internship, 89% Full Time, 6% Part Time, and 4% Contract. Highlights an 84% Physical, 5% Hybrid, and 11% Remote job distribution, with an average salary of $113,164 per year, or $54.4 per hour.

Design Verification Engineer

Apple

Austin, TX

$175K - $308K/yr

Full-time

Medical, Dental, Retirement

Re-posted 29 days ago


Apple rating

8.0

Company rating: 8.0 out of 10

Based on 677 frontline employees who took The Breakroom Quiz

7th of 30 rated technology retailers


Job description

Apple is where individual imaginations gather together, committing to the values that lead to great work. Every new product we build, service we create, or Apple Store experience we deliver is the result of us making each other’s ideas stronger. That happens because every one of us shares a belief that we can make something wonderful and share it with the world, changing lives for the better. It’s the diversity of our people and their thinking that inspires the innovation that runs through everything we do. When we bring everybody in, we can do the best work of our lives. Here, you’ll do more than join something - you’ll add something.
Do you have a passion for innovation and technical excellence? Do you thrive on solving complex problems that push the boundaries of what's possible? Join our team to verify innovative, high-throughput cellular baseband modems and transceiver link controllers that power communication for millions of users worldwide.
Description
As a Design Verification Engineer, you'll be at the center of our silicon design group's verification efforts, ensuring the quality and reliability of next-generation cellular systems. Working on innovative baseband modems and RF link controllers for Apple's SOCs, you'll craft highly reusable UVM verification environments that set the standard for quality and efficiency. You'll develop comprehensive coverage-driven and directed test cases that thoroughly validate complex IP and subsystem designs, working closely with multi-functional teams throughout the process.
In this role, you'll drive methodology innovation by deploying sophisticated tools and techniques that elevate verification practices and ensure tape-out readiness. Collaborating with product development teams across Apple, you'll help deliver cellular systems that redefine industry capabilities and enhance customer experiences globally. This position offers exceptional opportunities to deepen your expertise across cellular protocols, complex IP and subsystem architectures, advanced fabric protocols, and sophisticated debug methodologies. You'll gain experience with best-in-class design verification practices, co-verification techniques with models and firmware, and industry-standard low-power architectures.
We're looking for engineers with hands-on ASIC design verification experience using reusable verification methodologies such as UVM. The ideal candidate excels at detailed test planning, adapts optimally to evolving requirements, knowledge of the latest ML based tools to improve productivity and is driven to achieve the highest quality standards. You thrive in collaborative environments and are eager to address the verification challenges inherent in complex, high-performance cellular systems. If you want to contribute to products that impact customers worldwide while advancing your technical expertise, we'd love to hear from you.","responsibilities":"Construct detailed test plans for various components of the design including use cases, through collaborative work with multi-functional teams.
Create coverage driven verification plans from specifications, review and refine to achieve coverage targets.
Architect UVM-based, reusable test benches with components for stimulus, checkers, VIPs and reference models.
Leverage Large Language Models (LLMs) to enhance verification processes, delivering improvements in efficiency and quality.
Design and implement ML-driven workflows that increase team productivity and overall quality of verification.
Implement test plans from RTL simulation bring-up to sign-off; report and debug failures.
Maintain regressions and report the verification progress against test plans and coverage metrics.
Preferred Qualifications
Master of Science degree in Electrical Engineering/Computer Science.
Experience in C/C++ modeling for design verification.
Knowledge of 4G/5G cellular physical layer operation (3GPP).
Experience with verification of embedded processor cores.
Hands-on verification experience of Bus Fabric, NOC, AHB, AXI, based bus architecture in UVM environment.
Experience using LLMs to improve efficiency and quality of verification.
Understanding of prompt engineering and LLM workflow optimization.
Minimum Qualifications
BS and a minimum of 10 years relevant industry experience.
Strong knowledge of System Verilog and UVM.
Skilled in System C, C/C++, Python/perl.
Highly proficient in developing and establishing DV Methodologies.
Experience in using LLMs and MCPs.
Experience with developing Python-based automation solutions.
Experience with constraint random testing, SVA, Coverage driven verification.
Strong test planning and problem-solving skills.
Pay & Benefits
At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $175,000 and $308,500, and your base pay will depend on your skills, qualifications, experience, and location.
Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

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About Apple

Sourced by ZipRecruiter

Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.

Industry

Computer and electronic product manufacturing

Company size

10,000+ Employees

Headquarters location

Cupertino, CA, US

Year founded

1976