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Senior Asic Design Engineer Jobs in Romeoville, IL

LLRF FPGA Design Engineer

Batavia, IL · On-site

$111K - $146K/yr

The candidate will work in a design team environment under the supervision of a more senior engineer or scientist. Activities for this candidate will include: What your day-to-day as a Low-Level ...

Senior Roadway Engineer

Chicago, IL · On-site +1

$107K - $147K/yr

These projects include significant design-build opportunities, as well as traditional design-bid ... senior transportation engineers * Technical assignments may include roadway and highway geometrics ...

Senior Mechanical Engineer

Naperville, IL · On-site

$104K - $137K/yr

Design and modify key components, ensuring they meet rigorous specifications. * Lead technical reviews of calculations and design deliverables, while offering guidance and support and mentoring to ...

Senior DevOps Engineer

Chicago, IL

$133K - $172K/yr

As a Senior DevOps Engin eer , you will be a key technical contributor responsible for designing ... Design, engineer, and automate secure, scalable cloud infrastructure in Azure and AWS using ...

Senior DevOps Engineer

Chicago, IL

$133K - $172K/yr

As a Senior DevOps Engin eer , you will be a key technical contributor responsible for designing ... Design, engineer, and automate secure, scalable cloud infrastructure in Azure and AWS using ...

Senior DevOps Engineer

Chicago, IL · On-site

$133K - $172K/yr

As a Senior DevOps Engin eer , you will be a key technical contributor responsible for designing ... Design, engineer, and automate secure, scalable cloud infrastructure in Azure and AWS using ...

Showing results 41-60

Senior Asic Design Engineer information

See Romeoville, IL salary details

$142.7K

$181.1K

$223.8K

How much do senior asic design engineer jobs pay per year?

As of Aug 6, 2026, the average yearly pay for senior asic design engineer in Romeoville, IL is $181,137.00, according to ZipRecruiter salary data. Most workers in this role earn between $162,100.00 and $198,800.00 per year, depending on experience, location, and employer.

What does a senior ASIC design engineer do?

A Senior ASIC Design Engineer is responsible for designing and developing Application-Specific Integrated Circuits (ASICs) used in a wide range of electronic devices. They lead the architecture, implementation, and verification of complex digital or mixed-signal circuits, often collaborating with cross-functional teams. This senior role involves optimizing designs for performance, power, and area while ensuring that the final product meets stringent technical and quality requirements. Additionally, they may mentor junior engineers and contribute to design methodologies and best practices within the organization.

What are the key skills and qualifications needed to thrive as a senior ASIC design engineer?

To thrive as a Senior ASIC Design Engineer, you need deep expertise in digital and/or analog circuit design, strong knowledge of hardware description languages (HDLs) like Verilog or VHDL, and a relevant engineering degree. Familiarity with EDA tools such as Synopsys, Cadence, and Mentor Graphics, as well as experience with simulation, synthesis, and verification methodologies, is typically required. Outstanding problem-solving, collaboration, and communication skills set top performers apart in this role. These competencies ensure efficient design cycles, robust chip functionality, and successful delivery of complex semiconductor projects.

What is the difference between Senior Asic Design Engineer vs Digital IC Design Engineer?

AspectSenior Asic Design EngineerDigital IC Design Engineer
Required CredentialsBachelor's/Master's in Electrical Engineering, VLSI, or related fields; experience in ASIC designBachelor's/Master's in Electrical Engineering, VLSI, or related fields; focus on digital circuit design
Work EnvironmentDesign teams in semiconductor or tech companies, hardware development labsIntegrated circuit design teams, research labs, semiconductor companies
Employer & Industry UsageUsed in ASIC development, FPGA design, hardware accelerationUsed in digital chip design, FPGA development, digital system integration

The main difference is that a Senior Asic Design Engineer specializes in designing application-specific integrated circuits, often leading complex projects, while a Digital IC Design Engineer focuses on digital circuit design within integrated circuits. Both roles require similar educational backgrounds and work environments but differ in project scope and specialization.

What are some common challenges senior ASIC design engineers face when collaborating with cross-functional teams?

Senior ASIC Design Engineers often work closely with verification, software, and systems teams throughout the development cycle. One common challenge is ensuring clear communication of design specifications and changes, as misunderstandings can lead to integration issues or delays. Balancing multiple project timelines and adapting to evolving requirements from other departments can also be demanding. Building strong, collaborative relationships and using robust documentation and project management tools are key to overcoming these challenges.
What are popular job titles related to Senior Asic Design Engineer jobs in Romeoville, IL? For Senior Asic Design Engineer jobs in Romeoville, IL, the most frequently searched job titles are:
What cities near Romeoville, IL are hiring for Senior Asic Design Engineer jobs? Cities near Romeoville, IL with the most Senior Asic Design Engineer job openings:
Infographic showing various Senior Asic Design Engineer job openings in Romeoville, IL as of June 2026, with employment types broken down into 91% Full Time, 7% Part Time, and 2% Contract. Highlights an 88% Physical, 8% Hybrid, and 4% Remote job distribution, with an average salary of $181,137 per year, or $87.1 per hour.

LLRF FPGA Design Engineer

Fermilab

Batavia, IL • On-site

$111K - $146K/yr

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Re-posted 16 days ago


Fermilab rating

9.1

Company rating: 9.1 out of 10

Based on 9 frontline employees who took The Breakroom Quiz

11th of 120 rated laboratories


Job description

The expected hiring range for this position is:
$111,400.00-$146,600.00.
Please note that the pay range information is a general guideline only. The pay offered to a selected candidate will be determined based on factors such the scope and responsibilities of the position, qualifications of the selected candidate, business considerations, internal equity, and external market pay for comparable jobs.
This position does not provide relocation, or sponsorship.
About the role:
Fermilab seeks a highly motivated LLRF System Design Engineer in the Accelerator Division RF Department's Low-Level RF Group to support operating systems in the Booster Synchrotron and new development of systems for the Recycler and Main Injector Synchrotrons. The candidate will work in a design team environment under the supervision of a more senior engineer or scientist. Activities for this candidate will include:
What your day-to-day as a Low-Level Radio Frequency FPGA Engineer at Fermilab will look like:
  • LLRF System Design for high power synchrotrons
  • Develop design specifications based on project requirements.
  • Design of complex control algorithms for the RF field regulation of RF cavities.
  • Real-time high-speed signal processing and control systems design using FPGA's
  • Develop model-based design simulation/design using Simulink or MATLAB.
  • Support in development of FPGA based real-time embedded systems.
  • Perform system verification and validation for efficiency, reliability, and compatibility.
  • Abide by all environment, safety, and health regulations.

Essential Competencies and Attributes for Success:
  • A minimum of a Bachelor of Science in Electrical or Computer Engineering from an accredited institution or equivalent scientific education (Master's degree preferred)

Applicable Knowledge, Skills and Abilities Required:
  • 10+ years of experience with RF System design work at accelerator linac or synchrotron
  • Firmware development with VHDL/Verilog using Intel/Xilinx FPGA's/Tools
  • Experience in logic simulation/verification of complex FPGA designs.
  • A strong understanding of digital signal processing, control system design, embedded systems software and firmware development is highly desirable.
  • Circuit design experience specifying, implementing, and optimizing circuitry that includes low noise amplifiers, power amplifiers, filters, phase locked loops, RF switches, and base band circuits is preferred.

Work Arrangement:
Please note that the described work arrangement is subject to change based on business needs and is not guaranteed to be final.
  • Onsite: This is an onsite role, and the candidate must be able to work from our Batavia office.

Benefits/Perks:
Fermilab offers a competitive and comprehensive benefits program, including:
  • Medical, Dental, Vision and Flexible Spending Accounts
  • Paid time off
  • Life insurance
  • Short and Long-term disability insurance
  • Retirement benefits
  • Onsite day care

Why Fermilab:
Fermilab is America's premier laboratory for particle physics and accelerator research, funded by the U.S. Department of Energy. We support discovery science experiments in Illinois and locations around the world, including deep underground mines in South Dakota and Canada, mountaintops in Arizona and Chile, CERN in Europe and the South Pole.
Pre-Employment Screening:
Drug-Free Workplace & Pre-Employment Screening
Fermilab is dedicated to fostering a safe, productive and drug-free environment. An offer of employment is contingent upon the successful completion of a background check and drug screening.
HSPD-12
In accordance with Homeland Security Presidential Directive 12 (HSPD-12) new employees are required to obtain and maintain a HSPD-12 Personal Identity Verification (PIV) Credential. To obtain this credential, new employees must successfully complete and pass a federal background check investigation. This investigation includes a declaration of illegal drug activities, including use, supply, possession, or manufacture. This includes marijuana and cannabis derivatives, which are still considered illegal under federal law, regardless of state laws. Failure to obtain or maintain such government access authorization could result in the withdrawal of a job offer or future termination of employment.
Foreign Government Sponsored Activities
Fermilab employees, and certain guest researchers and contractors, are subject to particular restrictions related to participation in Foreign Government Sponsored or Affiliated Activities, as defined and detailed in United States Department of Energy Order 486.1A. Such individuals will be asked to disclose any participation for review by Fermilab's Office of General Counsel.
REAL-ID Requirement for access to Fermilab Campus
Fermilab requires all members of the public to produce a REAL-ID, or equivalent, to access the Fermilab Campus for interviews or career events. A list of acceptable forms of ID can be found here: https://get-connected.fnal.gov/wp-content/uploads/2021/09/REALID-Documents.pdf. If a candidate is selected for an interview but does not possess any of the equivalent documents, we may schedule a virtual interview.
Equal Opportunity Statement
Fermilab is an equal opportunity employer. We evaluate qualified applicants without regard to race, color, religion, sex, age, national origin, disability, veteran status, genetic information, and other legally protected categories.

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