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Senior Asic Design Engineer Jobs in Romeoville, IL

Fermilab

Jr. ASIC Design Engineer

Batavia, IL · On-site

$70K - $93K/yr

We are looking for a Junior ASIC Design Engineer to lead and contribute to research activities and engineering work focused on developing custom instrumentation for extreme radiation and/or cryogenic ...

IMC

Hardware Engineer

Chicago, IL · On-site

$127K - $168K/yr

What You'll Do ASIC Design & Development * Participate in the full ASIC development lifecycle, from specification through integration and deployment * Design and implement RTL for next-generation ...

IMC

Hardware Engineer

Chicago, IL · On-site

$127K - $167K/yr

What You'll Do ASIC Design & Development * Participate in the full ASIC development lifecycle, from specification through integration and deployment * Design and implement RTL for next-generation ...

Sterling Engineering Inc.

SR Design Engineer

Wheaton, IL · On-site +1

$135K - $160K/yr

Senior Design Engineer - Electric Distribution Location: Remote/Wheaton, IL Hire Type: Direct Hire Salary: $135K-$160K/YR Benefits: Medical, Dental, Vision, Life Insurance, 401(k) with company match ...

The Will Group

Senior Design Engineer

Wheaton, IL · On-site

$130K - $165K/yr

The Will Group is seeking a Senior Design Engineer - Electrical Distribution to help lead utility engineering projects serving Commonwealth Edison and other Exelon operating companies. This is an ...

Luxus

Senior Design Engineer - Bridge

West Chicago, IL · Hybrid

$85K - $115K/yr

Senior Design Engineer - Bridge Location: Chicago, IL (Hybrid - Flexible Schedule, Partial Remote) Company: Epstein Global (Represented by Luxus Group) Salary: $85,000 - $115,000 annually Experience ...

Luxus

Senior Design Engineer - Bridge

West Chicago, IL · Hybrid

$85K - $115K/yr

Senior Design Engineer - Bridge Location: Chicago, IL (Hybrid - Flexible Schedule, Partial Remote) Company: Epstein Global (Represented by Luxus Group) Salary: $85,000 - $115,000 annually Experience ...

Luxus

Senior Design Engineer - Bridge

West Chicago, IL · On-site

$85K - $115K/yr

Senior Design Engineer - Bridge Location: Chicago, IL (Hybrid - Flexible Schedule, Partial Remote) Company: Epstein Global (Represented by Luxus Group) Salary: $85,000 - $115,000 annually Experience ...

IMC

Hardware Engineer

Chicago, IL · On-site

$127K - $167K/yr

IMC is seeking a Hardware Engineer to join our Global Hardware team and help develop the next ... You'll contribute across the ASIC development lifecycle, from RTL design and validation to ...

Outform Inc

Senior Design Engineer

Chicago, IL · On-site

JOB SUMMARY The Senior Design Engineer is responsible for leading the engineering development of retail display solutions, ensuring designs meet requirements for functionality, manufacturability, and ...

Ashby

Design Engineer - Americas

Chicago, IL · Remote

$122K - $220K/yr

Design Engineer (This Posting) - This posting covers both Mid and Senior levels. You have 2+ years of continuous experience (e.g., internships don't count) as an Engineer or a Designer. You have good ...

AECOM

Senior Water Main Design Engineer

Chicago, IL · On-site

AECOM is seeking a Senior Water Main Design Engineer to support the Chicago Department of Water's multi-billion Capital Improvement Program (CIP). This is a key position within the Water Main Design ...

AECOM

Senior Water Main Design Engineer

Chicago, IL

AECOM is seeking a Senior Water Main Design Engineer to support the Chicago Department of Water's multi-billion Capital Improvement Program (CIP). This is a key position within the Water Main Design ...

AECOM

Senior Water Main Design Engineer

Chicago, IL · On-site

AECOM is seeking a Senior Water Main Design Engineer to support the Chicago Department of Water's multi-billion Capital Improvement Program (CIP). This is a key position within the Water Main Design ...

Akuna Capital

Senior FPGA Engineer

Chicago, IL · On-site

$145K/yr

What you'll do as a Senior FPGA Engineer at Akuna: We are looking for Senior FPGA Engineers to ... or ASIC digital logic design - network traffic experience a strong plus * Deep Verilog ...

Akuna Capital

Senior FPGA Engineer

Chicago, IL · On-site

$145K/yr

What you'll do as a Senior FPGA Engineer at Akuna: We are looking for Senior FPGA Engineers to ... or ASIC digital logic design - network traffic experience a strong plus * Deep Verilog ...

SWE Solutions

Design Engineer I

Chicago, IL · On-site

$33 - $48/hr

... directed by senior engineers. * Stay current with advancements in civil engineering design ... practices, tools, and regulations. Requirements Education and Qualifications * Bachelor's degree in ...

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All JobsAsic Design Engineer JobsSenior Asic Design Engineer JobsSenior Asic Design Engineer Jobs in Romeoville, IL

Senior Asic Design Engineer information

See Romeoville, IL salary details

$142.7K

$181.1K

$223.8K

How much do senior asic design engineer jobs pay per year?

As of Jul 17, 2026, the average yearly pay for senior asic design engineer in Romeoville, IL is $181,137.00, according to ZipRecruiter salary data. Most workers in this role earn between $162,100.00 and $198,800.00 per year, depending on experience, location, and employer.

What does a Senior ASIC Design Engineer do?

A Senior ASIC Design Engineer is responsible for designing and developing Application-Specific Integrated Circuits (ASICs) used in a wide range of electronic devices. They lead the architecture, implementation, and verification of complex digital or mixed-signal circuits, often collaborating with cross-functional teams. This senior role involves optimizing designs for performance, power, and area while ensuring that the final product meets stringent technical and quality requirements. Additionally, they may mentor junior engineers and contribute to design methodologies and best practices within the organization.

What are the key skills and qualifications needed to thrive as a Senior ASIC Design Engineer, and why are they important?

To thrive as a Senior ASIC Design Engineer, you need deep expertise in digital and/or analog circuit design, strong knowledge of hardware description languages (HDLs) like Verilog or VHDL, and a relevant engineering degree. Familiarity with EDA tools such as Synopsys, Cadence, and Mentor Graphics, as well as experience with simulation, synthesis, and verification methodologies, is typically required. Outstanding problem-solving, collaboration, and communication skills set top performers apart in this role. These competencies ensure efficient design cycles, robust chip functionality, and successful delivery of complex semiconductor projects.

What is the difference between Senior Asic Design Engineer vs Digital IC Design Engineer?

AspectSenior Asic Design EngineerDigital IC Design Engineer
Required CredentialsBachelor's/Master's in Electrical Engineering, VLSI, or related fields; experience in ASIC designBachelor's/Master's in Electrical Engineering, VLSI, or related fields; focus on digital circuit design
Work EnvironmentDesign teams in semiconductor or tech companies, hardware development labsIntegrated circuit design teams, research labs, semiconductor companies
Employer & Industry UsageUsed in ASIC development, FPGA design, hardware accelerationUsed in digital chip design, FPGA development, digital system integration

The main difference is that a Senior Asic Design Engineer specializes in designing application-specific integrated circuits, often leading complex projects, while a Digital IC Design Engineer focuses on digital circuit design within integrated circuits. Both roles require similar educational backgrounds and work environments but differ in project scope and specialization.

What are some common challenges Senior ASIC Design Engineers face when collaborating with cross-functional teams?

Senior ASIC Design Engineers often work closely with verification, software, and systems teams throughout the development cycle. One common challenge is ensuring clear communication of design specifications and changes, as misunderstandings can lead to integration issues or delays. Balancing multiple project timelines and adapting to evolving requirements from other departments can also be demanding. Building strong, collaborative relationships and using robust documentation and project management tools are key to overcoming these challenges.
What are popular job titles related to Senior Asic Design Engineer jobs in Romeoville, IL? For Senior Asic Design Engineer jobs in Romeoville, IL, the most frequently searched job titles are:
What cities near Romeoville, IL are hiring for Senior Asic Design Engineer jobs? Cities near Romeoville, IL with the most Senior Asic Design Engineer job openings:
Senior Asic Design Engineer jobs near you
Jr. ASIC Design Engineer

Jr. ASIC Design Engineer

Fermilab

Batavia, IL • On-site

$70K - $93K/yr

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Posted 25 days ago

Job description

The expected hiring range for this position is:
$70,800.00-$93,200.00.
Please note that the pay range information is a general guideline only. The pay offered to a selected candidate will be determined based on factors such the scope and responsibilities of the position, qualifications of the selected candidate, business considerations, internal equity, and external market pay for comparable jobs.
About the Role:
We are looking for a Junior ASIC Design Engineer to lead and contribute to research activities and engineering work focused on developing custom instrumentation for extreme radiation and/or cryogenic environments.
What your day-to-day as a Junior ASIC Design Engineer at Fermilab will look like:
  • Performing a leading role in Analog and RF ASIC design projects, while being able to contribute individually to major design tasks.
  • Developing design specifications for ASICs based on theoretical analyses and in conjunction with application needs.
  • Designing circuit networks using schematic entry and layout tools with full custom or timing-driven layout tools in Cadence CAD/EDA or a similar environment.
  • Models circuit networks and system components in hardware-description languages (Verilog-A and Verilog/SystemVerilog).
  • Building test benches and carries out analog and/or RF circuit simulations.
  • Executing physical and functional circuit and system verification.
  • Preparing documentation and participates in test-board designs and laboratory testing.
  • Delivering presentations internally, at national and international workshops, and at the topical conferences.
  • Performing other duties as assigned by supervisor.
  • Abiding by and being responsible for performing all duties in accordance with all environmental, health and safety regulations and practices pertinent to this position.

Skills and Attributes for Success:
  • Bachelor's degree in an applicable Engineering discipline from an ABET accredited institution.

Applicable Knowledge, Skills and Abilities Required:
  • Readiness for working on challenging projects that may have tight schedules.
  • Capability of working as part of a design team in a research and development environment
  • Experience with industry-standard front-end and back-end CAD/EDA design tools, such as Cadence, Synopsys and Mentor for the IC design.
  • Familiarity with principles of instrumentation for radiation detection with solid state or gaseous detectors and usages in extreme environments, like cryogenic or radiation harsh conditions
  • Strong computer skills and competence in performing analytical engineering calculations, in drawing schematics and in documentation.

Work Arrangement:
Please note that the described work arrangement is subject to change based on business needs and is not guaranteed to be final.
  • Hybrid: is a work arrangement in which an employee as part of an ongoing regular schedule, works at an alternative worksite in the United States (e.g., an employee's residence) on some days and at the primary worksite on other days. Requires an approved hybrid work request for one or more days a week worked remotely within the United States on a routine basis.

Benefits/Perks:
Fermilab offers a competitive and comprehensive benefits program, including:
Medical, Dental, Vision and Flexible Spending Accounts
  • Paid time off
  • Life insurance
  • Short and Long-term disability insurance
  • Retirement benefits
  • Onsite day care

Why Fermilab:
Fermilab is America's premier laboratory for particle physics and accelerator research, funded by the U.S. Department of Energy. We support discovery science experiments in Illinois and locations around the world, including deep underground mines in South Dakota and Canada, mountaintops in Arizona and Chile, CERN in Europe and the South Pole.
Pre-Employment Screening:
Drug-Free Workplace & Pre-Employment Screening
Fermilab is dedicated to fostering a safe, productive and drug-free environment. An offer of employment is contingent upon the successful completion of a background check and drug screening.
HSPD-12
In accordance with Homeland Security Presidential Directive 12 (HSPD-12) new employees are required to obtain and maintain a HSPD-12 Personal Identity Verification (PIV) Credential. To obtain this credential, new employees must successfully complete and pass a federal background check investigation. This investigation includes a declaration of illegal drug activities, including use, supply, possession, or manufacture. This includes marijuana and cannabis derivatives, which are still considered illegal under federal law, regardless of state laws. Failure to obtain or maintain such government access authorization could result in the withdrawal of a job offer or future termination of employment.
Foreign Government Sponsored Activities
Fermilab employees, and certain guest researchers and contractors, are subject to particular restrictions related to participation in Foreign Government Sponsored or Affiliated Activities, as defined and detailed in United States Department of Energy Order 486.1A. Such individuals will be asked to disclose any participation for review by Fermilab's Office of General Counsel.
REAL-ID Requirement for access to Fermilab Campus
Fermilab requires all members of the public to produce a REAL-ID, or equivalent, to access the Fermilab Campus for interviews or career events. A list of acceptable forms of ID can be found here: https://get-connected.fnal.gov/wp-content/uploads/2021/09/REALID-Documents.pdf. If a candidate is selected for an interview but does not possess any of the equivalent documents, we may schedule a virtual interview.
Equal Opportunity Statement
Fermilab is an equal opportunity employer. We evaluate qualified applicants without regard to race, color, religion, sex, age, national origin, disability, veteran status, genetic information, and other legally protected categories.

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