Root Cause Analysis Engineer Jobs in Phoenix, AZ

## Ocotillo Failure Analysis Engineer – TEM/Probing EngineerApplylocations: US, Arizona, Phoenixtime type: Full timeposted on: Posted Todayjob requisition id: JR0286340# **Job Details:**## Job Description:The world is transforming - and so is Intel. Intel is a company of bold and curious inventors and problem solvers who create some of the most astounding technology advancements and experiences in the world. With a legacy of relentless innovation and a commitment to bring smart, connected devices to every person on Earth, our diverse and brilliant teams are continually searching for tomorrow's technology and revel in the challenge that changing the world for the better brings. We work every single day to design and manufacture silicon products that empower people's digital lives. Come join us and do something wonderful.Join us as a Manufacturing Failure Analysis Engineer, where you'll play a pivotal role in ensuring the quality and reliability of Intel's next-generation silicon, product, package, platforms, and board process technologies. You will identify failures, conduct root cause analyses, and develop innovative methodologies to enhance performance and yield. By leveraging your expertise, you'll contribute to driving manufacturing innovation and supporting the delivery of world-class products. The ideal candidate brings hands-on experience in probing, strong understanding of device behavior, and the ability to independently execute complex debug workflows. **Business group** You will be part of Intel's manufacturing organization, a cornerstone of our operations that focuses on advancing semiconductor process technologies and ensuring product excellence. This team is dedicated to delivering high-quality solutions that support Intel's broader mission to create groundbreaking technologies that power the future. **Key Responsibilities:** • Operate general failure analysis tools in the labs, such as TEM, SEM, optical scopes. • Perform electrical probing and advanced characterization on silicon devices (wafer-level and site-specific structures) • Set up, operate, and troubleshoot probe stations and electrical measurement systems. • Execute complex test plans and interpret schematics, layouts, and device structures to support failure analysis workflows. • Analyze electrical data (e.g., IV, CV, leakage, shorts/opens) to support fault isolation and root cause identification. • Partner with FA engineers to integrate probing with SEM, FIB/PFIB, and TEM-based workflows. • Drive improvements in probing methods, workflows, and best-known methods (BKMs) • Provide technical guidance to junior engineers and technicians on probing techniques and lab practices. • Support tool ownership activities including troubleshooting, calibration, and uptime improvement. • Participate in lab sustaining, process transfer, and cross-functional yield improvement initiatives.## **Qualifications:**You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your degree, research and or relevant previous job and or internship experiences.**Minimum Qualifications:** • Bachelor's degree in Electrical Engineering, Materials Science, Physics, Engineering or related STEM fields. • 2+ years of hands-on experience with TEM or FIB or SEM or nanoprobing instrumentation in a lab or applications setting in other techniques OR 2+ years of experience in a lab setting where samples are prepared for analysis. • US citizenship required. • Ability to obtain and maintain a US Government Security Clearance. **Preferred Qualifications:** • MS, or PhD in Materials Science, Physics, Engineering or related STEM fields • Possibility of working a shifted schedule with at least one weekend day at least two weeks a month. (Sunday-Thursday or Tuesday-Saturday) • Knowledge of semiconductor process fundamentals and the advances in fabrication technology over the past decade. • Knowledge or direct experience with general failure analysis tools in a semiconductor laboratory. • Demonstrated independent quick-learning ability on lab instrumentation. • Excellent verbal and written communication skills. • Demonstrated ability to lead and manage lab staff. • Prior experience working with US Government contracts including security and sensitive document handling and/or Top-Secret US Government clearance. • Active US Government Security Clearance, with a minimum of Secret level.## Job Type:Experienced Hire## Shift:Shift 1 (United States of America)## Primary Location:US, Arizona, Phoenix## Additional Locations:## Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.## ## Position of TrustN/A## BenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.Annual Salary Range for jobs which could be performed in the US: $103,730.00-170,630.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.**Work Model for this Role**This role will require an on-site presence. \* Job posting details (such as work model, location or time type) are subject to change. #J-18808-Ljbffr