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Rf Analog Physical Design Engineer Jobs (NOW HIRING)

RF/Analog Mixed Signal Design Engineer

Sunnyvale, CA ยท On-site

$237K/yr

... to the physical world as well as enable optimizing their performance. You will become part of a ... Description RF/Analog Mixed Signal Design Engineer will work on transistor level IC design ...

RF Analog Design Engineer Austin, TX Salary $110,000 - $160,000 / yr The Company Join a recognized leader in rugged embedded computing for aerospace, defense, and industrial markets. This is an ...

The RF/Analog Design Engineer responsibilities include, but are not limited to the following: * Designs and develops high speed analog products for electro-optics, laser electronics, and other ...

... level design of RF analog integrated circuits with a Master's degree in Electrical Engineering ... and conduct physical verification on the layout; perform review of generated layout. * Reviews ...

The RF/Analog Design Engineer responsibilities include, but are not limited to the following: * Designs and develops high speed analog products for electro-optics, laser electronics, and other ...

RF/Analog Mixed Signal Design Engineer

Sunnyvale, CA ยท On-site

$237K/yr

... to the physical world as well as enable optimizing their performance. You will become part of a ... Description RF/Analog Mixed Signal Design Engineer will work on transistor level IC design ...

... design of RF analog integrated circuits with a Master's degree in Electrical Engineering. โ€ข Ph.D ... physical verification on the layout; perform review of generated layout. โ€ข Reviews block-level ...

Description RF/Analog Mixed Signal Design Engineer will work on transistor level IC design ... Experience in chip integration working with Digital Design and Physical Design teams. Experience in ...

The RF/Analog Design Engineer responsibilities include, but are not limited to the following: * Designs and develops high speed analog products for electro-optics, laser electronics, and other ...

The RF/Analog Design Engineer responsibilities include, but are not limited to the following: * Designs and develops high speed analog products for electro-optics, laser electronics, and other ...

The RF/Analog Design Engineer responsibilities include, but are not limited to the following: * Designs and develops high speed analog products for electro-optics, laser electronics, and other ...

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Rf Analog Physical Design Engineer information

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$37K

$117.7K

$183K

How much do rf analog physical design engineer jobs pay per year?

As of Sep 12, 2026, the average yearly pay for rf analog physical design engineer in the United States is $117,680.00, according to ZipRecruiter salary data. Most workers in this role earn between $97,500.00 and $139,000.00 per year, depending on experience, location, and employer.

What is an RF Analog Physical Design Engineer?

An RF Analog Physical Design Engineer is a specialized engineer who focuses on the physical layout and design of radio frequency (RF) and analog integrated circuits. They work on translating circuit schematics into physical layouts that can be manufactured on a semiconductor chip, ensuring performance, reliability, and manufacturability. Their responsibilities include working closely with circuit designers, optimizing layouts for signal integrity and minimizing noise, and using specialized CAD tools for design. This role is essential in industries such as wireless communications, automotive, and consumer electronics, where high-frequency analog circuits are crucial.

What are some common challenges faced by RF Analog Physical Design Engineers when collaborating with cross-functional teams?

RF Analog Physical Design Engineers often work closely with layout designers, digital designers, and system architects to ensure that the physical implementation of circuits meets performance, area, and power specifications. A common challenge is balancing design trade-offs, such as minimizing parasitic effects while adhering to strict design rules and timelines. Effective communication is crucial to resolve discrepancies between schematic intent and layout realities. Additionally, coordinating across teams to integrate mixed-signal blocks can be complex, requiring strong problem-solving skills and adaptability.

What are the key skills and qualifications needed to thrive as an RF Analog Physical Design Engineer, and why are they important?

To thrive as an RF Analog Physical Design Engineer, you need a solid background in electrical engineering, circuit design, and semiconductor physics, often supported by a relevant degree. Proficiency with EDA tools like Cadence Virtuoso, SPICE simulators, and layout verification systems is typically required. Strong problem-solving skills, attention to detail, and effective teamwork are critical soft skills for success in this role. These competencies are essential for designing robust, high-performance analog circuits that meet stringent specifications and function reliably in advanced electronic systems.

What are popular job titles related to Rf Analog Physical Design Engineer jobs?

For Rf Analog Physical Design Engineer jobs, the most frequently searched job titles are:

Infographic showing various Rf Analog Physical Design Engineer job openings in the United States as of August 2026, with employment types broken down into 1% As Needed, 75% Full Time, 19% Part Time, 1% Temporary, 3% Contract, and 1% Nights. Highlights an 97% Physical, 1% Hybrid, and 2% Remote job distribution, with an average salary of $117,680 per year, or $56.6 per hour.

Sr. Analog Physical Design Engineer

Santa Clara, CA โ€ข On-site

OMNIVISION
Software Developmentย โ€ขย 1 - 5K employees

$156K - $160K/yr

Full-time

Re-posted 21 days ago


Job description

Description
Job Title: Sr. Analog Physical Design Engineer
Job Duties:
  • Work on detailed column ADC circuit design, with a focus on column layout design. Collaborating with other column ADC designers to optimize column ADC's performance with minimum silicon area.
  • Conduct cross products column ADC layout comparison and IP layout development and maintenance.
  • Perform RCX extraction of column circuit and critical signals parasitic analysis and propose optimized design to improve column ADC performance and image quality.
  • Conduct image sensor pixel array and column ADC supply analysis using Totem or other methodologies, including worst case P2P resistor extraction, and optimize chip floorplan and power routing.
  • Study design rules for new processes and provide physical design guidelines to the design team. Debug and develop Calibre svrf files when needed.
  • Apply SKILL script to improve productivity and design robustness.
  • Responsible for full-custom analog IC layout and physical verification (DRC/ANT/DFM/ERC/LVS) using industry-standard tools like Cadence Virtuoso and Calibre.
  • Execute top-level layout and coordinate layout resources and schedules for all modules.
  • Perform floor planning and placements including pad locations, power/clock domain planning, ESD, integration of AMS and digital blocks, and chip-level routing strategy.
  • Lead top-level implementation from floorplan through GDS tape-out.
  • Develop and maintain layout methodologies and documentation to ensure efficient and consistent design practices.

Requirements:
Require Master's degree or foreign equivalent degree in Electrical Engineering, Electronics Engineering, or a closely related field.
Require 2 years of experience in CMOS image sensor IC layout design.
Require the following experience or skills:
  • Semiconductor process and device fundamentals, with expertise in addressing advanced technology nodes challenges.
  • Experience in image sensor manufacturing technology, performance metrics, and system-level integration in camera applications.
  • Experience with industry standard EDA tools, such as Cadence Virtuoso, PVS, Spectre, Innovus, Skipper, Siemens Calibre, Synopsys Hspice, Design Compiler, IC Compiler, PrimeTime, Laker and P2P.
  • Front-end and back-end ASIC design flows.
  • Experience in stacked chip process flow and related design considerations.
  • Skills in interpreting physical verification reports (DRC, DFM, ERC, LVS, etc.) and understanding SVRF rule files.
  • Advanced layout skills such as common-centroid layouts, symmetrical layouts, use of dummy devices, matching, ESD, latch-up, antenna effects, etc.
  • Understanding of layout impact on device matching, noise coupling, guard-ring, electromigration, isolation and IR drop.
  • Developing CAD flow automation using scripting languages like Perl, Skill, and Tcl.
  • Expertise in low-power, high-precision, high speed analog layout design techniques.
  • Solving crosstalk challenges between adjacent column ADCs in image sensor circuits.

Annual base salary for this role in California, US is expected to be between $156,853 - $160,000. Actual pay will be determined on a number of factors such as relevant skills and experience, and the pay of employees in the similar role.