ZipRecruiter

Log In

2

Remote Physical Design Engineer Jobs in Phoenix, AZ

PowerLattice

Principal Digital Design Engineer

Chandler, AZ · On-site +1

$200K - $250K/yr

Ensure RTL is optimized for synthesis, timing, and physical design * Work on scan insertion, test ... While we are primarily seeking candidates in HQ-Vancouer and Chandler, remote flexibility may be ...

BreatheSuite

Remote Physical Therapist - Contract

Phoenix, AZ · Remote

$1.7K - $2.2K/wk

Remote Physical Therapist Classification: 1099 Independent Contractor Work Structure: Fully Remote ... Monitor patient progress using BreatheSuite's RTM platform and adjust programming based on symptom ...

BreatheSuite

Remote Physical Therapist - Contract

Phoenix, AZ · Remote

$1.7K - $2.2K/wk

Remote Physical Therapist Classification : 1099 Independent Contractor Work Structure: Fully Remote ... Monitor patient progress using BreatheSuite's RTM platform and adjust programming based on symptom ...

Lochner

Airport Design Engineer

Mesa, AZ · On-site +1

Design of airport engineering projects including runways, taxiways, aprons, airfield lighting ... Flexible Work Schedules (Hybrid or Remote, when possible) * Wellness Program for Physical and ...

Renesas Electronics

Staff Analog Design Engineer

Chandler, AZ · On-site +1

$198K/yr

We are seeking a Staff Analog Design Engineer to drive the design of complex Power Management ICs ... Our people-first culture and global support system, including the remote work option and Employee ...

Renesas Electronics

Staff Analog Design Engineer

Chandler, AZ · On-site +1

$198K/yr

We are seeking a Staff Analog Design Engineer to drive the design of complex Power Management ICs ... Our people-first culture and global support system, including the remote work option and Employee ...

next page

Showing results 1-20

All JobsPhysical Design Engineer JobsRemote Physical Design Engineer JobsRemote Physical Design Engineer Jobs in Phoenix, AZ

Remote Physical Design Engineer information

See Phoenix, AZ salary details

$94.3K

$140.5K

How much do remote physical design engineer jobs pay per year?

As of Aug 3, 2026, the average yearly pay for remote physical design engineer in Phoenix, AZ is $138,420.00, according to ZipRecruiter salary data. Most workers in this role earn between $135,000.00 and $139,000.00 per year, depending on experience, location, and employer.

What is the difference between Remote Physical Design Engineer vs Remote ASIC Design Engineer?

AspectRemote Physical Design EngineerRemote ASIC Design Engineer
Required CredentialsBachelor's/Master's in Electrical Engineering or Computer Engineering, knowledge of EDA toolsBachelor's/Master's in Electrical Engineering or Computer Engineering, knowledge of ASIC design tools
Work EnvironmentDesign teams, EDA tool suites, remote collaborationDesign teams, simulation environments, remote collaboration
Industry UsageSemiconductor, electronics manufacturingSemiconductor, electronics manufacturing
Search & Comparison IntentYesYes

The Remote Physical Design Engineer focuses on the physical implementation of integrated circuits, ensuring layout and timing meet specifications. The Remote ASIC Design Engineer is involved earlier in the design process, focusing on architecture and logic design. Both roles require similar educational backgrounds and often work within the same industry sectors, but their responsibilities differ in the design stages they cover.

What are the key skills and qualifications needed to thrive as a remote physical design engineer, and why are they important?

To thrive as a Remote Physical Design Engineer, you need a solid background in VLSI design, digital circuit fundamentals, and experience with ASIC or FPGA physical implementation, usually supported by a degree in electrical or computer engineering. Expertise in EDA tools like Cadence, Synopsys, or Mentor Graphics, and familiarity with scripting languages such as TCL or Python, are typically required. Strong problem-solving, communication, and time management skills are essential for effective collaboration and project delivery in a remote environment. These competencies ensure efficient design cycles, high-quality silicon, and smooth coordination with distributed teams.

How do remote physical design engineers typically collaborate with cross-functional teams to ensure design accuracy and project alignment?

Remote Physical Design Engineers work closely with circuit designers, verification engineers, and project managers through virtual meetings, shared project management tools, and version-controlled repositories. Effective communication is crucial, as they frequently review design updates, address integration issues, and ensure that deliverables meet timing, power, and area targets. Collaboration tools like Slack, Zoom, and Jira help bridge the distance, while regular design reviews and milestone check-ins keep everyone aligned. This remote setup encourages proactive communication and documentation to maintain project momentum and design integrity.

What is a remote physical design engineer?

A Remote Physical Design Engineer is a professional who specializes in the physical implementation of integrated circuits (ICs) and works from a remote location. Their primary responsibilities include tasks such as floorplanning, placement, routing, and timing closure of semiconductor chips using electronic design automation (EDA) tools. They collaborate with teams across different locations to ensure that the chip layouts meet performance, power, and area requirements. Working remotely, these engineers utilize secure network connections and cloud-based tools to access design environments and communicate with colleagues. This role requires a strong understanding of digital design, VLSI concepts, and proficiency with industry-standard EDA tools.
What are the most commonly searched types of Physical Design Engineer jobs in Phoenix, AZ? The most popular types of Physical Design Engineer jobs in Phoenix, AZ are:
What are popular job titles related to Remote Physical Design Engineer jobs in Phoenix, AZ? For Remote Physical Design Engineer jobs in Phoenix, AZ, the most frequently searched job titles are:
What job categories do people searching Remote Physical Design Engineer jobs in Phoenix, AZ look for? The top searched job categories for Remote Physical Design Engineer jobs in Phoenix, AZ are:
What cities near Phoenix, AZ are hiring for Remote Physical Design Engineer jobs? Cities near Phoenix, AZ with the most Remote Physical Design Engineer job openings:
Remote Physical Design Engineer jobs near you

Principal Digital Design Engineer

PowerLattice

Chandler, AZ • On-site, Remote

$200K - $250K/yr

Full-time

Medical, Dental, Vision, Retirement

Re-posted 4 days ago

Job description

Hybrid requiring 3 days a week onsite in the office
Reports To: Head of Engineering
About Us
PowerLattice is a well-funded semiconductor start-up company backed by well-known large Silicon Valley VCs. The company is working on the industry's groundbreaking chiplet solution for a fundamental shift in how high-performance chips get powered, paving the way for the next generation of AI and advanced computing.
About the Role
We are seeking a highly skilled and hands-on Principal Digital Design Engineer to drive the microarchitecture, design, and implementation of complex digital systems and SoC components. This role combines deep technical contribution with team leadership, requiring active involvement from microarchitecture definition through RTL development and into back-end implementation and silicon bring-up.
Key Responsibilities
  • Architecture & Hands-On Design
  • Define microarchitecture for complex digital blocks and subsystems
  • Actively contribute to RTL development for key components
  • Drive design tradeoffs across performance, power, area (PPA), and testability
  • RTL Development & Integration
  • Write, review, and integrate high-quality RTL
  • Lead block- and chip-level integration, resolving interface and system issues
  • Ensure designs are clean for lint, CDC/RDC, and synthesis
  • Back-End & Implementation Ownership
  • Ensure RTL is optimized for synthesis, timing, and physical design
  • Work on scan insertion, test architecture, and coverage closure
  • Perform, review and debug logic equivalence checking (LEC) results between RTL and netlists
  • Define and validate timing constraints (SDC) and complete timing closure
  • Drive and implement timing and functional ECOs as needed
  • Design Quality & Signoff
  • Drive signoff readiness including lint, CDC/RDC, synthesis, LEC, and timing checks
  • Ensure designs meet functional, timing, power, and test requirements
  • Support silicon bring-up, debug, and root-cause analysis
  • Cross-Functional Collaboration
  • Work closely with verification, physical design, DFT, and firmware teams
  • Align design decisions with verification plans and implementation
    Constraints
  • Act as the technical bridge between front-end and back-end teams

Qualifications
This is a Hybrid role requiring 3 days a week onsite at our HQ's in Vancouver, WA (Greater Portland Area) or Chandler, AZ. While we are primarily seeking candidates in HQ-Vancouer and Chandler, remote flexibility may be considered for exceptional candidates in Silicon Valley, CA.
  • Bachelor's or master's degree in electrical engineering, Computer Engineering, or related field
  • 10+ years of experience in digital design with significant hands-on RTL development
  • Proven track record of delivering complex SoC or subsystem designs to tapeout
  • Strong expertise in:
    • RTL design and microarchitecture
    • SoC integration and standard interfaces
  • Hands-on experience with back-end flows, including:
    • Scan insertion and DFT (scan, MBIST, test coverage)
    • Logic equivalence checking (LEC)
    • Static timing analysis (STA) and timing closure
    • Timing constraint development and debug (SDC)
  • Solid understanding of:
    • Clocking, resets, CDC/RDC, and low-power design
    • Synthesis and physical design implications
  • Experience with industry-standard EDA tools (Synopsys, Cadence)
  • Experience with low-power methodologies (UPF/CPF)
  • Strong debugging and problem-solving skills

Preferred Qualifications
  • Familiarity with advanced technology nodes and implementation challenges
  • Experience with formal verification techniques
  • Experience with silicon bring-up and post-silicon debug

Compensation & Benefits
Anticipated annual base salary for Member of Technical Staff: $200,000 - $250,000
  • Stock option grant
  • Comprehensive benefits package including health, dental, vision, and 401(k)

Apply