Remote Magazine Layout Designer Jobs in Idaho (NOW HIRING)

As a Principal Product Yield Analysis (PYA) Engineer at Micron, you will work with teams responsible for driving the advancement of next-generation devices and technology nodes, including HBM, from design to mature yield levels prior to transferring products to mass production.
Your primary focus will be resolving complex issues that impact test yield and overall product reliability during product introduction, with the objective of achieving yield and quality standards that enable rapid production ramp-up and accelerated time-to-market.
You will leverage electrical and electro-optical characterization methods, advanced production data correlation, and data analytics to identify root causes of failures, while coordinating yield and reliability improvement activities with cross-functional departments such as Product Engineering, Design, Test, Quality Assurance, R&D Yield Enhancement, and Manufacturing Yield Enhancement.

Key Responsibilities

• Perform electrical and physical failure analysis and optical fault isolation techniques including photon emission, optical probing, and microprobing to replicate probe failures and determine root cause

• Leverage Electronic Design Automation tools for circuit understanding, timing characterization, and failure signature analysis while exploring automation and ML/AI-driven solutions to enhance root cause methodologies

• Dissect fab and probe data using tools such as ESDA, layout/net tracing, and advanced image analyzers; monitor yields, analyze SWRs/conversions/excursions, and correlate probe data with inline monitors and backend reliability data

• Lead weekly teleconferences with remote and US sites to present findings, recommend corrective actions, and share lessons learned across mass production sites

• Mentor remote FA teams on advanced EFA/PFA methods and data analysis; provide 1st silicon support for new products/technology nodes and develop new FA techniques and shift-left strategies

Basic Qualifications

• BS, MS, or PhD in Electrical, Electronics, Photonics, Materials Science & Engineering, Applied Physics, Computer Engineering, or equivalent.

• 5+ years of relevant experience in the semiconductor field following completion of degree.

• Hands-on experience with electrical failure analysis, physical failure analysis, and optical fault isolation techniques.

• Proficiency in probe/backend test flows and fab data analysis methodologies.

• Strong communication skills in English with the ability to present complex technical findings clearly.

Preferred Qualifications

• Experience with advanced DRAM/HBM products and root cause analysis of 3D-integration/packaging technology.

• Familiarity with hybrid and 2.5D/3D EDA tools, including computer-aided schematic/layout/net tracing and simulation.

• Background in sub-10nm process nodes, semiconductor process coursework, or optical engineering coursework.

• Advanced programming skills (Java, C++, Python, R) with ML/AI experience applied to failure analysis or yield improvement.

• Willingness to travel to remote manufacturing sites; proficiency in additional languages is a plus.