Optical Design Engineer Jobs in Seattle, WA (NOW HIRING)

Optical Engineer, PIC Design & Analysis
Location: 100% Onsite at Redmond, WA
Contract Duration: 2 years contract
Pay Rate: $80/hr on W2
Benefits: Health, Dental, Vision, PTO, 401K
 

About the Role

The team is seeking an Optical Engineer III specializing in Photonic Integrated Circuit (PIC) design, simulation, layout, fabrication, and validation to contribute to the development of next-generation near-to-eye display technologies.

This role is focused specifically on waveguide-based photonic integrated circuits, including devices such as Mach-Zehnder interferometers (MZIs), ring resonators, grating couplers, splitters, and other integrated photonic components.

The ideal candidate will have demonstrated hands-on experience taking PIC designs from device concept and simulation through layout, fabrication/tapeout, and experimental validation. The engineer will work closely with researchers, technical program managers, engineering leadership, and external fabrication partners to translate photonic concepts into manufacturable devices.

This is not a general optical engineering or optical metrology role. Candidates must demonstrate direct PIC design experience.

The engineer will join an R&D organization focused on advanced near-to-eye display systems and integrated photonics. The role serves as a key technical contributor, working alongside full-time engineering leads, researchers, technical program managers, and cross-functional partners. The engineer will help bridge PIC device design, fabrication, experimental validation, and program objectives.

Key Responsibilities

• Design and develop photonic integrated circuits (PICs) from individual component blocks through complete circuit implementations.
• Design waveguide-based photonic devices such as MZIs, ring resonators, grating couplers, splitters, tapers, and related PIC components.
• Perform photonic device and circuit simulation, optimization, and parametric analysis.
• Generate fabrication-ready GDSII layouts and ensure compliance with semiconductor foundry Process Design Kits (PDKs).
• Support PIC designs through the complete design-to-fabrication and tapeout lifecycle.
• Incorporate fabrication constraints—including propagation loss, sidewall roughness, minimum feature sizes, bend radii, etch variation, and process variability—into device and circuit designs.
• Conduct design-space exploration, sensitivity analysis, and performance/yield modeling.
• Collaborate with commercial foundries and external partners to prepare designs for fabrication.
• Characterize and validate fabricated PIC devices using optical and electro-optic measurement techniques.
• Analyze expected versus measured performance, including optical loss, signal-to-noise ratio (SNR), coupling efficiency, and other relevant performance metrics.
• Identify sources of performance gaps between simulation/design expectations and experimental measurements.
• Collaborate with researchers, engineers, Technical Program Managers, and program leadership to align PIC development with broader technology objectives.
• Contribute technical insights to the development of advanced photonic technologies for next-generation near-to-eye display systems.

Minimum Qualifications

• Completed M.S. or Ph.D. in Electrical Engineering, Optical Sciences, Physics, Photonics, or a closely related technical discipline.
• 3+ years of hands-on PIC design, simulation, and layout experience for visible or infrared wavelengths.
• Experience designing waveguide-based PIC devices, such as:
  • Mach-Zehnder interferometers (MZIs)
  • Ring resonators
  • Grating couplers
  • Optical splitters/combiners
  • Waveguides and tapers
  • Active photonic components
• 3+ years of experience with photonic device simulation and electromagnetic modeling tools such as Lumerical FDTD/MODE/DEVICE, Ansys Photonics, Synopsys RSoft, or COMSOL Multiphysics.
• 2+ years of experience with PIC layout and GDSII generation using tools such as KLayout, Cadence Virtuoso, gdsfactory, or equivalent.
• Experience working with foundry PDKs, design rules, and fabrication constraints.
• 2+ years of scientific programming experience using Python, MATLAB, or equivalent for design automation, modeling, and data analysis.
• Experience supporting PIC fabrication or tapeout through a commercial semiconductor/photonics foundry.
• Demonstrated understanding of fabrication-induced performance limitations, including optical propagation loss, sidewall roughness, etch non-idealities, coupling loss, and process variability.
• Demonstrated ability to discuss specific PIC designs, design tools, loss budgets, expected performance, and measured results.

Required Technical Skills

The following capabilities are non-negotiable:

1. PIC Design & Simulation
   • 3+ years designing, simulating, and laying out waveguide-based PICs.
   • Experience with visible and/or IR photonic platforms.
2. Photonic Modeling
   • Hands-on proficiency with tools such as Lumerical, Ansys Photonics, Synopsys RSoft, COMSOL, or equivalent.
   • Ability to perform both component-level and circuit-level analysis.
3. PIC Layout & Tapeout
   • Experience with KLayout, Cadence Virtuoso, gdsfactory, or equivalent.
   • GDSII generation and layout verification.
   • Experience working with foundry PDKs and supporting commercial foundry tapeouts.
4. PIC Fabrication & Validation
   • Direct experience designing, fabricating, and/or validating PIC-based devices.
   • Ability to connect simulated performance with experimentally measured results.
5. Technical Performance Analysis
   • Ability to discuss optical losses, loss budgets, SNR, coupling efficiency, and discrepancies between expected and measured performance.

Preferred Qualifications

• 3+ years of experience with active PIC design, fabrication, and validation, particularly at visible wavelengths.
• Experience with LiNbO or BTO platforms.
• Experience with PIC circuit-level simulation tools such as Lumerical INTERCONNECT, Synopsys OptSim, or VPIphotonics.
• Experience with optical and electro-optic device characterization.
• Experience with fiber optics, PIC packaging, and optical coupling.
• Experience with free-space optics specifically as it relates to PIC characterization or packaging.
• Experience with design-space exploration, sensitivity analysis, statistical modeling, and yield analysis.
• Understanding of semiconductor fabrication processes and process-induced performance limitations.
• Experience optimizing PIC layouts for manufacturability, including minimum feature sizes, bend radii, taper geometries, scattering, and coupling losses.
• Experience with Python/MATLAB-based design automation and analysis.
• Experience at organizations working in advanced photonics, semiconductor, optical computing, AR/VR, or display technologies is a plus.

Pursuant to the California Fair Chance Act, Los Angeles County Fair Chance Ordinance for Employers, Los Angeles Fair Chance Initiative for Hiring Ordinance, and San Francisco Fair Chance Ordinance, qualified applicants will be considered for assignment with arrest and conviction records. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness, meet client expectations, standards, and accompanying requirements, and safeguard business operations and company reputation.
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