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Model Compress Engineer Jobs (NOW HIRING)

Use AI tools (Claude, Cursor, etc.) to compress reporting and analysis cycles--drafting queries ... Deep Salesforce fluency: data model, flows, custom fields/objects, reports, and the difference ...

AI/ML engineers, data scientists, domain experts, and enterprise stakeholders. You'll work within a ... models, and validated product direction * AI-accelerated design execution: Use AI tools to compress ...

Your work will directly influence how we compress knowledge into efficient encoders for fast search ... Ensure student models maintain high accuracy while drastically reducing inference latency and ...

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Model Compress Engineer information

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$38K

$90.5K

$150.5K

How much do model compress engineer jobs pay per year?

As of Jun 5, 2026, the average yearly pay for model compress engineer in the United States is $90,538.00, according to ZipRecruiter salary data. Most workers in this role earn between $71,500.00 and $100,000.00 per year, depending on experience, location, and employer.

What are some typical challenges faced by a Model Compress Engineer when optimizing machine learning models for deployment?

Model Compress Engineers often encounter challenges such as maintaining model accuracy while significantly reducing size and computational requirements. Balancing the trade-offs between compression rate, latency, and performance can be complex, especially when deploying models to resource-constrained environments like mobile devices or embedded systems. Additionally, integrating compressed models into existing production pipelines and ensuring compatibility across diverse hardware platforms can require close collaboration with data scientists, ML engineers, and software developers.

What are the key skills and qualifications needed to thrive as a Model Compression Engineer, and why are they important?

To thrive as a Model Compression Engineer, you need a strong background in machine learning, deep learning frameworks (such as TensorFlow or PyTorch), and a solid understanding of neural network architectures, usually supported by a degree in computer science or a related field. Familiarity with model compression techniques like pruning, quantization, knowledge distillation, and experience with relevant tools and libraries (e.g., ONNX, TensorRT) are essential. Strong problem-solving abilities, collaboration, and effective communication skills help in translating research into practical, efficient solutions. These skills are crucial for optimizing AI models to run efficiently on resource-constrained devices, improving deployment speed, and reducing computational costs.

What is a Model Compress Engineer?

A Model Compress Engineer is a professional who specializes in reducing the size and computational requirements of machine learning models without significantly impacting their performance. This role involves applying advanced techniques such as model pruning, quantization, knowledge distillation, and other optimization methods to make models more efficient. Model compress engineers are crucial for deploying AI models on resource-constrained devices like smartphones, IoT devices, and edge computing platforms. Their work helps improve inference speed, reduce memory usage, and lower energy consumption, making AI solutions more accessible and scalable.
Infographic showing various Model Compress Engineer job openings in the United States as of May 2026, with employment types broken down into 93% Full Time, and 7% Contract. Highlights an 93% In-person, and 7% Remote job distribution, with an average salary of $90,538 per year, or $43.5 per hour.
System Speed and Reliability Co-Design Engineer

System Speed and Reliability Co-Design Engineer

Nvidia Corporation

Santa Clara, CA โ€ข On-site

Full-time

Posted 9 days ago


Job description

SCG sits at the crossroads of design, architecture, marketing, and productization-owning the journey from the architecture stage through final product definition across Gaming, Datacenter, Automotive, and Embedded markets. As a Silicon Speed Features Engineer, you will co-design system-level speed features, build the validation and automation infrastructure to characterize them, and lead debug of the complex silicon issues that stand between a program and on-time shipment. This is a hands-on role for an engineer who combines deep technical craft with the drive to compress cycle time using modern tooling-including AI-without losing rigor.
What You'll Be Doing:
  • Collaborate cross-functionally with system architects, hardware, firmware/software, process/reliability, and operations teams to co-design system-level speed features and deliver industry-defining products.
  • Define System level specifications, margins, bounding box constraints that satisfy design expectations and product quality.
  • Provide system requirements for hardware and features affecting speed and reliability, from pre-silicon through productization.
  • Translate hardware features and architectural requirements into validation techniques that achieve full coverage across testing flows.
  • Perform closed loop validation by correlating silicon behavior against timing simulation and design expectations; provide actionable feedback to improve future designs.
  • Define, prototype, and refine pre- and post-silicon bring-up flows to ensure product quality, performance, and schedule efficiency.
  • Design and implement automation tools for system speed modeling; apply AI and LLM-assisted workflows (e.g., automated log analysis, pattern detection, scripting acceleration) to compress characterization and debug cycles.
  • Architect and influence testability features critical to performance, power, and reliability in partnership with design, DFx, and ATE teams.
  • Lead debug of complex silicon and system-level issues, including show-stopper defects, to enable on-time product shipment.

What We Need to See:
  • MS in EE, CE, Systems Engineering, or equivalent experience.
  • 4+ years of experience in a related hardware engineering role.
  • Hands-on experience with silicon bring-up, frequency and power characterization, PPA analysis in pre- and post-silicon phases, System/Platform level understanding, tester-to-system correlation, and lab instrumentation (oscilloscopes, multimeters, DAQs).
  • Scripting proficiency in Python and/or Perl; comfortable in Windows, Linux, and Android environments.
  • Familiarity with statistical methods and data analysis tools (JMP or equivalent).
  • Demonstrated use of AI or LLM-based tools (e.g., Claude, Copilot, ChatGPT) in an engineering workflow-scripting acceleration, log triage, data analysis-with clear judgment about output validation and where automation introduces risk.

Ways to stand out from the crowd:
  • Background in gaming, automotive, or datacenter segments.
  • Experience building or deploying AI-assisted characterization, log analysis, or debug automation workflows in a production silicon environment.
  • Familiarity with LLM evaluation, prompt engineering, or agentic scripting pipelines applied to silicon data analysis.

Our team is at the forefront of silicon innovation, advancing groundbreaking technologies. We offer a dynamic work environment where your contributions will directly impact the company's success. Join us to advance your career in a role where you can truly make a difference. With competitive salaries and a generous benefits package, we are widely considered one of the technology industry's most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us, and due to unprecedented growth, our exclusive engineering teams are rapidly growing. If you're a creative and autonomous engineer with a real passion for technology, we want to hear from you!
#LI-Hybrid
Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4.
You will also be eligible for equity and benefits.
Applications for this job will be accepted at least until June 1, 2026.
This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.
NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

Nvidia logo

About Nvidia

Sourced by ZipRecruiter

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology--and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent.

Industry

Computer and electronic product manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

Year founded

1993